Methods and systems for generating an inspection process for a wafer

• US 8,112,241 B2
• Filed: 03/13/2009
• Issued: 02/07/2012
• Est. Priority Date: 03/13/2009
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation
• Original Assignee: KLA-Tencor Corporation
• Inventors: Xiong, Yan
• Primary Examiner(s): Le, John H
• Application Number:
  US12/403,905
• Publication Number:
  US 20100235134A1
• Time in Patent Office: 1,061 Days
• Field of Search: 702/33, 702/35, 702/117, 702/182, 702/183, 702/187, 702/123, 250/310, 356/237.3, 356/237.4, 356/394, 382/141, 382/144, 382/145, 700/90, 700/108, 700/109, 700/110, 703/104
• US Class Current: 702/117
• CPC Class Codes: G01N 2021/8854 Grading and classifying of flaws
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10

Abstract

Methods and systems for generating an inspection process for a wafer are provided. One computer-implemented method includes separately determining a value of a local attribute for different locations within a design for a wafer based on a defect that can cause at least one type of fault mechanism at the different locations. The method also includes determining a sensitivity with which defects will be reported for different locations on the wafer corresponding to the different locations within the design based on the value of the local attribute. In addition, the method includes generating an inspection process for the wafer based on the determined sensitivity. Groups may be generated based on the value of the local attribute thereby assigning pixels that will have at least similar noise statistics to the same group, which can be important for defect detection algorithms. Better segmentation may lead to better noise statistics estimation.

Claims

1. A computer-implemented method for generating an inspection process for a wafer, comprising:

separately determining a value of a local attribute for different locations within a design for a wafer based on a defect that can cause at least one type of fault mechanism at the different locations;

determining a sensitivity with which defects will be reported for different locations on the wafer corresponding to the different locations within the design based on the value of the local attribute; and

generating an inspection process for the wafer based on the determined sensitivity, wherein using the inspection process, defects are detected based on magnitude of a characteristic of individual output in output generated for the wafer during the inspection process and are not detected based on size of the defects.

2. The computer-implemented method of claim 1, wherein the value of the local attribute is critical radius of the defect that can cause at least one type of fault mechanism at the different locations.

3. The computer-implemented method of claim 1, wherein the value of the local attribute is determined as a function of at least one dimension of one or more features of the design at the different locations, one or more features of the design proximate to the different locations, or some combination thereof.

4. The computer-implemented method of claim 1, wherein separately determining the value of the local attribute is performed using design data for the design.

5. The computer-implemented method of claim 1, wherein separately determining the value of the local attribute is performed based on the defect that can cause the at least one type of fault mechanism at the different locations and one or more parameters of an inspection system that will perform the inspection process.

6. The computer-implemented method of claim 1, wherein the different locations span an entirety of the design.

7. The computer-implemented method of claim 1, wherein the value of the local attribute has an inverse relationship to the sensitivity.

8. The computer-implemented method of claim 1, wherein the determined sensitivity is different than a sensitivity with which defects will be detected at the different locations on the wafer.

9. The computer-implemented method of claim 1, wherein the sensitivity is the sensitivity with which the defects will be detected at the different locations on the wafer and reported for the different locations on the wafer.

10. The computer-implemented method of claim 1, wherein the sensitivity is a sensitivity to the magnitude of the characteristic of the individual output in the output generated for the wafer during the inspection process.

11. The computer-implemented method of claim 1, further comprising generating a map of the values of the local attribute as a function of the different locations within the design, wherein determining the sensitivity is performed using the map.

12. The computer-implemented method of claim 1, wherein determining the sensitivity comprises generating a map of the sensitivities with which the defects will be reported for the different locations on the wafer as a function of the different locations within the design.

13. The computer-implemented method of claim 1, wherein determining the sensitivity comprises assigning the different locations within the design to different groups based on the value of the local attribute thereby assigning the different locations on the wafer corresponding to the different locations within the design that will have at least similar noise statistics to the same group.

14. The computer-implemented method of claim 1, wherein determining the sensitivity comprises assigning the different locations within the design to different segments based on the value of the local attribute and separately estimating noise statistics for the different segments, and wherein the noise statistics are noise statistics for the output that would be generated during the inspection process at the different locations on the wafer corresponding to the different locations within the design assigned to the different segments.

15. The computer-implemented method of claim 1, wherein determining the sensitivity comprises assigning the different locations within the design to different segments based on the value of the local attribute, separately estimating noise statistics for the different segments, and determining the sensitivity for the different segments based on the noise statistics, and wherein the noise statistics are noise statistics for the output that would be generated during the inspection process at the different locations on the wafer corresponding to the different locations within the design assigned to the different segments.

16. The computer-implemented method of claim 1, wherein determining the sensitivity comprises assigning different portions of an entire range of values of the local attribute to different segments, separately determining different sensitivities for the different segments based on the values of the local attribute in the different portions assigned to the different segments, and separately assigning the different locations within the design to the different segments based on the different portions in which the values of the local attribute determined for the different locations fall.

17. The computer-implemented method of claim 1, wherein determining the sensitivity comprises assigning different portions of an entire range of values of the local attribute to different segments, separately determining different sensitivities for the different segments based on the values of the local attribute in the different portions assigned to the different segments, and generating a map of the sensitivities with which the defects will be reported for the different locations on the wafer as a function of the different locations within the design based on the value of the local attribute for the different locations, the different portions of the entire range of the values of the local attribute assigned to the different segments, and the different sensitivities determined for the different segments.

18. The computer-implemented method of claim 1, further comprising separately determining a value of a local image attribute for the different locations on the wafer based on the output generated for the wafer by an inspection system during the inspection process, wherein determining the sensitivity is performed based on the values of the local attribute and the local image attribute.

19. The computer-implemented method of claim 1, further comprising separately determining a value of a local image attribute for the different locations on the wafer based on the output generated for the wafer by an inspection system during the inspection process, wherein determining the sensitivity is performed based on the value of the local attribute, the value of the local image attribute, and coordinate inaccuracy of the inspection system.

20. The computer-implemented method of claim 1, wherein determining the sensitivity is performed based on the value of the local attribute and information about hot spots in the design.

21. The computer-implemented method of claim 1, wherein the value of the local attribute does not indicate if the different locations within the design are hot spots in the design, and wherein determining the sensitivity is not performed based on information about the hot spots in the design.

22. The computer-implemented method of claim 1, wherein the design printed on the wafer cannot be resolved by an inspection system that performs the inspection process.

23. The computer-implemented method of claim 1, wherein separately determining the value of the local attribute and determining the sensitivity are performed before defects are detected on the wafer in the inspection process.

24. The computer-implemented method of claim 1, wherein separately determining the value of the loca attribute and determining the sensitivity are performed, offline.

25. The computer-implemented method of claim 1, wherein using the inspection process, the defects are reported based on the magnitude of the characteristic of the individual output in the output generated for the wafer during the inspection process and are not reported based on the size of the defects.

26. The computer-implemented method of claim 1, wherein the inspection process comprises determining a position of the output generated for the wafer by an inspection system during the inspection process in design data space such that the output generated at the different locations on the wafer corresponding to the different locations within the design can be identified.

27. A computer-readable medium, comprising program instructions executable on a computer system for performing a computer-implemented method for generating an inspection process for a wafer, wherein the computer-implemented method comprises:

separately determining a value of a local attribute for different locations within a design for a wafer based on a defect that can cause at least one type of fault mechanism at the different locations;

determining a sensitivity with which defects will be reported for different locations on the wafer corresponding to the different locations within the design based on the value of the local attribute; and

generating an inspection process for the wafer based on the determined sensitivity, wherein using the inspection process, defects are detected based on magnitude of a characteristic of individual output in output generated for the wafer during the inspection process and are not detected based on size of the defects.

28. A system configured to generate and perform an inspection process on a wafer, comprising:

a computer subsystem configured to;

separately determine a value of a local attribute for different locations within a design for a wafer based on a defect that can cause at least one type of fault mechanism at the different locations;

determine a sensitivity with which defects will be reported for different locations on the wafer corresponding to the different locations within the design based on the value of the local attribute; and

generate an inspection process for the wafer based on the determined sensitivity; and

an inspection subsystem configured to perform the inspection process on the wafer, wherein using the inspection process defects are detected based on magnitude of a characteristic of individual output in output generated for the wafer during the inspection process and are not detected based on size of the defects.