Triodes using nanofabric articles and methods of making the same

• US 8,115,187 B2
• Filed: 05/21/2008
• Issued: 02/14/2012
• Est. Priority Date: 05/22/2007
• Status: Expired due to Fees

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Segal, Brent M., Ward, Jonathan W., Rueckes, Thomas
• Primary Examiner(s): Wagner, Jenny L
• Assistant Examiner(s): Valentine, Jami M
• Application Number:
  US12/124,475
• Publication Number:
  US 20090115305A1
• Time in Patent Office: 1,364 Days
• Field of Search: 257/4, 313/300, 313/293, 313/297, 313/497, 977/742, 445/56
• US Class Current: 257/4
• CPC Class Codes: H01J 19/38 Control electrodes, e.g. grid
• CPC Class Codes: H01J 21/10 with one or more immovable internal control electrodes, e.g. triode, pentode, octode
• CPC Class Codes: H01J 2203/0232 characterised by the material
• CPC Class Codes: H01J 3/021 Electron guns using a field emission, photo emission, or secondary emission electron source
• CPC Class Codes: Y10S 977/742 Carbon nanotubes, CNTs

Abstract

Vacuum microelectronic devices with carbon nanotube films, layers, ribbons and fabrics are provided. The present invention discloses microelectronic vacuum devices including triode structures that include three-terminals (an emitter, a grid and an anode), and also higher-order devices such as tetrodes and pentodes, all of which use carbon nanotubes to form various components of the devices. In certain embodiments, patterned portions of nanotube fabric may be used as grid/gate components, conductive traces, etc. Nanotube fabrics may be suspended or conformally disposed. In certain embodiments, methods for stiffening a nanotube fabric layer are used. Various methods for applying, selectively removing (e.g. etching), suspending, and stiffening vertically- and horizontally-disposed nanotube fabrics are disclosed, as are CMOS-compatible fabrication methods. In certain embodiments, nanotube fabric triodes provide high-speed, small-scale, low-power devices that can be employed in radiation-intensive applications.

Claims

1. A multi-terminal vacuum field emission device comprising:

two substrates disposed at a predetermined gap and which define a space therebetween;

spacers positioned between the two substrates to vacuum seal the space formed by the two substrates while maintaining the gap;

a top electrode and a bottom electrode, arranged in proximity to the two substrates, the top electrode comprising an electron emission source;

a gate region of nanotube fabric disposed between the top electrode and the bottom electrode, the nanotube fabric being electrically insulated from the top electrode and the bottom electrode, and a gate terminal in electrical communication with the nanotube fabric;

wherein in response to an electrical stimulus on the gate terminal, the gate region of nanotube fabric induces emission of electrons from the electron emission source to form an electrically conductive pathway between the top and bottom electrodes.

2. The device of claim 1, comprising a triode, wherein the top electrode comprises an emitter and the bottom electrode comprises a collector.

3. The device of claim 1, further comprising a second patterned region of nanotube fabric disposed in a plane substantially parallel to and in spaced relation to the gate region of nanotube fabric, the second patterned region disposed between the top and bottom electrodes and in electrical communication with a corresponding terminal to receive electrical stimulus.

4. The device of claim 3, comprising a tetrode.

5. The device of claim 3, further comprising a third patterned region of nanotube fabric disposed in a plane substantially parallel to and in space relation to the gate region of nanotube fabric, the third patterned region disposed between the top and bottom electrodes and in electrical communication with a corresponding terminal to receive electrical stimulus.

6. The device of claim 5, comprising a pentode.

7. The device of claim 1, integrated in a CMOS circuit.

8. The device of claim 1, wherein the electrical stimulus comprises a relatively small voltage signal and wherein the controllable electrically conductive pathway is sensitive to the relatively small electrical voltage signal.

9. The device of claim 1, wherein the nanotube fabric comprises a mesh grid structure.

10. The device of claim 1, wherein the nanotube fabric comprises a substantially porous layer.

11. The device of claim 1, wherein the nanotube fabric comprises a plurality of unaligned nanotubes forming a network of conductive pathways.

12. The device of claim 1, wherein the plurality of nanotubes comprise metallic nanotubes.

13. The device of claim 11, wherein at least some of the nanotube are partially coated with a stiffening agent.

14. The device of claim 13, wherein the stiffening agent comprises a dielectric such that the mechanical characteristics of the nanotube fabric are substantially affected by the stiffening agent and such that the electrical characteristics of the nanotube fabric are substantially unaffected by the stiffening agent.

15. The device of claim 1, wherein the nanotube fabric is at least partially coated with a silicon-based material.

16. The device of claim 1, wherein the nanotube fabric is at least partially coated with a metal.

17. The device of claim 11, wherein the unaligned nanotubes substantially form a monolayer.

18. The device of claim 11, wherein the unaligned nanotubes form a multi-layered fabric.

19. The device of claim 1, wherein the bottom electrode comprises a layer of nanotube fabric.

20. The device of claim 1, wherein the top electrode comprises a layer of nanotube fabric.

21. The device of claim 1, wherein the bottom electrode and the top electrode each comprises a metal.

22. The device of claim 1, wherein the patterned region of nanotube fabric is selectively deformed from a planar orientation to alter a capacitance state between the top electrode and the bottom electrode.

23. The device of claim 19, wherein the bottom electrode comprising a layer of nanotube fabric is arranged along a plane substantially parallel to the plane of the grid.

24. The device of claim 19, wherein the bottom electrode is suspended in spaced relation to a surface of the two substrates.

25. The device of claim 24, wherein the bottom electrode is substantially mechanically deformed to alter a capacitance value between the gate region and the bottom electrode.

26. The device of claim 1, wherein the bottom electrode is conformally disposed on one surface of the two substrates.

27. The device of claim 1, wherein the top electrode is conformally disposed on one surface of the two substrates.