Compensation of LDO regulator using parallel signal path with fractional frequency response
First Claim
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1. A low drop out (LDO) voltage regulator comprising:
- a pass transistor having a first electrode coupled by an output conductor to a load and a second electrode coupled to an input voltage;
an error amplifier having a first input coupled to a reference voltage, a second input connected to a feedback conductor, and an output coupled to a control electrode of the pass transistor;
a parallel path transistor having a first electrode coupled to the input voltage, a control electrode coupled to the output of the error amplifier, and a second electrode coupled to the feedback conductor, wherein the gate of the parallel path transistor is coupled to the output of the error amplifier by means of an offset voltage source; and
a feedback resistance coupled between the feedback conductor and the output conductor.
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Abstract
A low drop out (LDO) voltage regulator (10) includes a pass transistor (MPpass) having a source coupled by an output conductor (4) to a load and a drain coupled to an input voltage to be regulated. An error amplifier (2) has a first input coupled to a reference voltage, a second input connected to a feedback conductor (4A), and an output coupled to a gate of the pass transistor. A parallel path transistor (MPpa) has a source coupled to the input voltage, a gate coupled to the output (3) of the error amplifier (2), and a drain coupled to the feedback conductor. A feedback resistor (Rf) is coupled between the feedback conductor and the output conductor.
27 Citations
18 Claims
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1. A low drop out (LDO) voltage regulator comprising:
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a pass transistor having a first electrode coupled by an output conductor to a load and a second electrode coupled to an input voltage; an error amplifier having a first input coupled to a reference voltage, a second input connected to a feedback conductor, and an output coupled to a control electrode of the pass transistor; a parallel path transistor having a first electrode coupled to the input voltage, a control electrode coupled to the output of the error amplifier, and a second electrode coupled to the feedback conductor, wherein the gate of the parallel path transistor is coupled to the output of the error amplifier by means of an offset voltage source; and a feedback resistance coupled between the feedback conductor and the output conductor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of operating a low drop out (LDO) voltage regulator with low quiescent current and at least a predetermined phase margin despite large variations in load current, the method comprising:
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applying an input voltage to a first electrode of a pass transistor and coupling a second electrode of the pass transistor to an output conductor applying an output voltage to a load; coupling a first input of an error amplifier to a reference voltage, and coupling an output of the error amplifier to a control electrode of the pass transistor; coupling a feedback resistance between the output conductor and a second input of the error amplifier; and compensating the LDO voltage regulator by coupling a parallel path transistor between the input voltage and the second input of the error amplifier and by coupling a control electrode of the parallel path transistor to the output of the error amplifier, wherein an offset voltage is applied between the control electrode of the parallel path transistor and the output of the error amplifier. - View Dependent Claims (15, 16, 17)
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18. A low drop out (LDO) voltage regulator with low quiescent current and at least a predetermined phase margin despite large variations in load current, comprising:
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a pass transistor and means for applying an input voltage to a first electrode of the pass transistor and means for coupling a second electrode of the pass transistor to apply an output voltage to a load; means for coupling a first input of an error amplifier to a reference voltage and means for coupling an output of the error amplifier to a control electrode of the pass transistor; means for coupling a feedback resistance between the output voltage and a second input of the error amplifier; and parallel path means coupled between the input voltage and the second input of the error amplifier for compensating a feedback loop of the LDO voltage regulator, the parallel path means comprising a second transistor having a gate thereof coupled to the output of the error amplifier via offset voltage means.
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Specification