Differential signaling system and flat panel display with the same

• US 8,115,505 B2
• Filed: 04/01/2008
• Issued: 02/14/2012
• Est. Priority Date: 04/02/2007
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Ryu, Jee-youl
• Primary Examiner(s): Dole, Timothy J
• Application Number:
  US12/060,330
• Publication Number:
  US 20080238443A1
• Time in Patent Office: 1,414 Days
• Field of Search: 324/629, 324/760.01, 324/770
• US Class Current: 324/760.01
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2330/028 Generation of voltages supplied to electrode drivers in a matrix display other than LCD
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04

Abstract

A differential signaling system, wherein a first wiring and a second wiring are coupled between a sending end and a receiving end as a differential signal line. A termination resistor is coupled between the first wiring and the second wiring in the receiving end side. A test circuit is coupled to the termination resistor in parallel, and amplifies and detects a variation of a differential impedance due to the differential signal line. The test circuit includes: a differential test amplifier for amplifying a variation in the differential impedance of the first wiring or the second wiring; a switching unit installed at an input terminal of the differential test amplifier for controlling an operation of the differential test amplifier; and a peak detector for converting an output signal of the differential test amplifier into a direct current component.

Claims

1. A differential signaling system comprising:

a differential signal line having a first wiring and a second wiring coupled between a sending end and a receiving end of the system;

a termination resistor coupled between the first wiring and the second wiring in the receiving end side of the system; and

a test circuit directly coupled to the termination resistor in parallel and configured to amplify and detect a variation of a differential impedance due to the differential signal line,

wherein the test circuit includes;

a differential test amplifier configured to amplify the variation in the differential impedance of the first wiring or the second wiring and output an output signal through an output terminal,

a switching unit installed at an input terminal of the differential test amplifier and configured to control an operation of the differential test amplifier, and

a peak detector coupled to the output terminal of the differential test amplifier and configured to convert the output signal of the differential test amplifier into a direct current component.

2. The differential signaling system as claimed in claim 1, wherein the test circuit is positioned at an outside of the receiving end.

3. The differential signaling system as claimed in claim 1, wherein the differential test amplifier has an input impedance value and an amplification gain value.

4. The differential signaling system as claimed in claim 1, wherein the peak detector has an envelope detection constant of 1.

5. A flat panel display comprising:

a display panel in which a plurality of data wirings and gate wirings are arranged to intersect each other;

a controller configured to receive an image signal from an exterior and to generate a control signal, and to output the image signal and the control signal through a differential signal line having first and second wirings;

a gate driver configured to receive the control signal from the controller and apply a scan signal to the gate wirings;

a data driver including a plurality of data driving circuits configured to receive the image signal and/or the control signal from the controller through the first and second wirings and apply the image signal to the data wirings; and

a test circuit directly coupled to a termination resistor in parallel and configured to amplify and detect a variation of a differential impedance due to the differential signal line, the termination resistor being coupled between the first wiring and the second wiring in a receiving end,

wherein the test circuit includes;

a differential test amplifier configured to amplify the variation in the differential impedance of the first wiring or the second wiring and output an output signal through an output terminal,

a switching unit installed at an input terminal of the differential test amplifier and configured to control an operation of the differential test amplifier, and

a peak detector coupled to the output terminal of the differential test amplifier and configured to convert an output signal of the differential test amplifier into a direct current component.

6. The flat panel display as claimed in claim 5, wherein the test circuit is positioned at an outside of the data driving circuits.

7. The flat panel display as claimed in claim 5, wherein the differential test amplifier has an input impedance value and an amplification gain value.

8. The flat panel display as claimed in claim 5, wherein the peak detector has an envelope detection constant of 1.

9. A differential signaling circuit, comprising:

a sending end and a receiving end of the differential signaling circuit;

a first wiring and a second wiring to connect the sending end and the receiving end, and to carry a differential signal between the sending end and the receiving end;

a termination resistor coupled between the first wiring and the second wiring in the receiving end; and

a test circuit positioned at the receiving end and connected to the first and second wirings, the test circuit generating an amplified output signal from an output signal that is based on a signal voltage of the differential signal, and a variance in a voltage of the amplified output signal is indicative of an impedance variance in the differential signaling circuit, wherein the test circuit includes;

a differential test amplifier configured to amplify the variation in the differential impedance of the first wiring or the second wiring and output an output signal through an output terminal,

a switching unit installed at an input terminal of the differential test amplifier and configured to control an operation of the differential test amplifier, and

a peak detector coupled to the output terminal of the differential test amplifier and configured to convert the output signal of the differential test amplifier into a direct current component.

10. The differential signaling circuit of claim 9, wherein the voltage of the amplified output signal is a predetermined multiple of the signal voltage of the differential signal, if impedances of the circuit are matched, and the voltage of the amplified output signal is another multiple of the signal voltage of the differential signal, if the impedances of the circuit are not matched.

11. The differential signaling circuit of claim 9, wherein a rate of variance in the voltage of the amplified output signal is greater than a rate of the impedance variance in the differential signaling circuit.

12. The differential signaling circuit of claim 9, wherein the variance in the voltage of the amplified output signal is based on the impedance variance in the differential signaling circuit.

13. The differential signaling circuit of claim 9, wherein the impedance variance in the differential signaling circuit corresponds to a change in an impedance of the first and/or second wirings.

14. The differential signaling circuit of claim 9, wherein the test circuit detects and amplifies a variation of a differential impedance in the differential signaling circuit and converts the amplified variation into a direct current component, to thereby easily detect presence of an impedance matching in the differential signaling circuit.

15. A flat panel display including the differential signaling circuit of claim 9, comprising:

a display panel in which a plurality of data wirings and gate wirings are arranged to intersect each other;

a controller to receive an image signal, to generate control signals, and to output the image signal and the control signals as the differential signal through the first and second wirings;

a gate driver to receive the control signals from the controller and apply a scan signal to the gate wirings;

a data driver including a plurality of data driving circuits to receive the image signal and/or the control signals from the controller through the first and second wirings and to apply the image signal to the data wirings.

16. A method of detecting a variance in an impedance of a differential signaling circuit, comprising:

transmitting a differential signal over a first wiring and a second wiring of the differential signaling circuit to connect a sending end and a receiving end of the differential signaling circuit, the first wiring and the second wiring being connected by a termination resistor coupled between the first wiring and the second wiring in the receiving end;

selectively connecting an input terminal of a differential test amplifier to the first wiring and the second wiring;

obtaining a signal voltage of the differential signal and generating an output signal based on the signal voltage of the differential signal;

amplifying the output signal to generate an amplified output signal, and amplifying a variance in a voltage of the amplified output signal that is indicative of an impedance variance in the differential signaling circuit; and

converting the amplified output signal into a direct current component.

17. The method of claim 16, wherein the voltage of the amplified output signal is a predetermined multiple of the signal voltage of the differential signal, if impedances of the circuit are matched, and the voltage of the amplified output signal is another multiple of the signal voltage of the differential signal, if the impedances of the circuit are not matched.

18. The method of claim 16, wherein the impedance variance in the differential signaling circuit corresponds to a change in an impedance of the first and/or second wirings.