Digital feedforward sigma-delta modulator in analog-to-digital converter and modulation method thereof

• US 8,120,518 B2
• Filed: 06/14/2010
• Issued: 02/21/2012
• Est. Priority Date: 06/14/2010
• Status: Active Grant

• Current Assignee: Korea Advanced Institute of Science and Technology
• Original Assignee: Korea Advanced Institute of Science and Technology
• Inventors: Jang, Yeong-Shin, Lee, Sang-Gug, Ryu, Seung-Tak
• Primary Examiner(s): Mai, Lam T
• Application Number:
  US12/814,533
• Publication Number:
  US 20110304491A1
• Time in Patent Office: 617 Days
• Field of Search: 341143-144
• US Class Current: 341/143
• CPC Class Codes: H03M 3/42 having multiple quantisers arranged in parallel loops
• CPC Class Codes: H03M 3/452 with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input

Abstract

A digital feedforward sigma-delta modulator in an analog-to-digital converter and its modulation method are disclosed. The modulator changes a feedforward path from an analog domain to a digital domain and processes it. The modulator integrates an analog input by using a plurality of integrators, weights them, quantizes them by using a plurality of quantizers in a digital domain to output digital signals, and then adds up the thusly outputted digital signals by using a digital adder. In case of a continuous time digital feedforward sigma-delta modulator (SDM), a digital signal outputted from the digital adder is weighted and then immediately inputted to the digital adder in the digital domain so as to be subtracted, allowing for digital feedforwarding. Because the feedforward signal is processed in the digital domain, the area occupied by an analog circuit and power consumption can be reduced. Also, because signals are added up in the digital domain, a digital output signal can be immediately used when an excess loop delay needs to be corrected. Thus, because there is no need to convert the digital output signal into an analog signal by using a DAC, the DAC can be omitted.

Claims

1. A digital feedforward sigma-delta modulator (SDM) for performing digital feedforward sigma-delta modulation on an analog input signal and outputting a corresponding digital output signal, the modulator comprising:

a plurality of integrators connected in series, receiving an analog signal, integrating the received analog signal and outputting a corresponding analog signal, respectively;

a plurality of multipliers weighting the analog signals outputted from the plurality of integrators and outputting the weighted analog signals, respectively;

a plurality of quantizers performing quantization on the analog signals outputted from the plurality of multipliers and outputting a digital signals, respectively; and

a digital adder adding up the digital signals outputted from the plurality of quantizers and outputting a corresponding digital output signal.

3. The modulator of claim 1, further comprising:

a digital-to-analog converter converting the digital output signal outputted from the digital adder into an analog signal;

an additional multiplier weighting the analog signal outputted from the digital-to-analog converter, and outputting the weighted analog signal; and

a subtractor subtracting the analog signal outputted from the additional multiplier, from an analog signal inputted to a first integrator positioned at the forefront among the plurality of integrators connected in series, and inputting it as an analog input signal of the first integrator.

5. The modulator of claim 3, wherein the plurality of multipliers multiply a pre-set coefficient to the analog input signal inputted to the first integrator and the analog signals outputted from the plurality of integrators to weight the signals, and outputs the respective signals.

7. The modulator of claim 5, wherein the number of the plurality of quantizers is equal to the number of the plurality of multipliers.

12. The method of claim 7, wherein, in inputting the analog input signal to the plurality of integrators, a value obtained by converting the digital output signal into an analog signal and weighting the same is subtracted from the analog input signal, and the resultant analog input signal is inputted to the plurality of integrators.

2. A digital feedforward sigma-delta modulator (SDM) for performing digital feedforward sigma-delta modulation on an analog input signal and outputting a corresponding digital output signal, the modulator comprising:

a plurality of integrators connected in series, receiving an analog signal, integrating the received analog signal and outputting a corresponding analog signal, respectively;

a plurality of multipliers weighting the analog signals outputted from the plurality of integrators and outputting a weighted analog signal, respectively;

a plurality of quantizers performing quantization on the analog signals outputted from the plurality of multipliers and outputting a digital signals, respectively;

a digital adder adding up the digital signals outputted from the plurality of quantizers, subtracting a signal inputted as a feedback signal from the result of the adding up the digital signals, and outputting a corresponding digital output signal; and

a second multiplier weighting the digital signal outputted from the digital adder and outputting the weighted digital signal to the digital adder.

4. The modulator of claim 2, further comprising:

a digital-to-analog converter converting the digital output signal outputted from the digital adder into an analog signal;

an additional multiplier weighting the analog signal outputted from the digital-to-analog converter, and outputting the weighted analog signal; and

a subtractor subtracting the analog signal outputted from the additional multiplier, from an analog signal inputted to a first integrator positioned at the forefront among the plurality of integrators connected in series, and inputting it as an analog input signal of the first integrator.

6. The modulator of claim 4, wherein the plurality of multipliers multiply a pre-set coefficient to the analog input signal inputted to the first integrator and the analog signals outputted from the plurality of integrators to weight the signals, and outputs the respective signals.

8. The modulator of claim 6, wherein the number of the plurality of quantizers is equal to the number of the plurality of multipliers.

9. The modulator of claim 2, wherein the second multiplier weights the digital signal outputted from the digital adder by multiplying a particular coefficient to the digital signal, and when the particular coefficient is set to be 0, the digital feedforward SDM operates as a discrete time digital feedforward SDM, and when the particular coefficient is set a value other than 0, the digital feedforward SDM operates as a continuous time digital feedforward SDM.

13. The method of claim 8, wherein, in inputting the analog input signal to the plurality of integrators, a value obtained by converting the digital output signal into an analog signal and weighting the same is subtracted from the analog input signal, and the resultant analog input signal is inputted to the plurality of integrators.

10. A digital feed-forward sigma-delta modulation method for performing digital feed-forward sigma-delta modulation on an analog input signal and outputting a corresponding digital output signal, the method comprising:

inputting an analog input signal to a plurality of integrators connected in series;

weighting the analog input signal and an analog signal outputted from each of the plurality of integrators, and outputting corresponding analog signals;

quantizing by plurality quantizers the weighted analog signals and outputting corresponding digital signals; and

adding up the digital signals and outputting a corresponding digital output signal.

11. A digital feed-forward sigma-delta modulation method for performing digital feed-forward sigma-delta modulation on an analog input signal and outputting a corresponding digital output signal, the method comprising:

inputting an analog input signal to a plurality of integrators connected in series;

weighting the analog input signal and analog signals outputted from the plurality of integrators, and outputting corresponding analog signals;

quantizing by plurality quantizers the weighted analog signals and outputting corresponding digital signals; and

adding up all the digital signals and outputting a corresponding digital output signal, and in this case, a signal, fed back after it is obtained by weighting the digital output signal, is applied as a subtraction value when the digital signals are all added up.