Low-cost non-volatile flash-RAM memory

• US 8,120,949 B2
• Filed: 07/30/2008
• Issued: 02/21/2012
• Est. Priority Date: 04/27/2006
• Status: Active Grant

• Current Assignee: Avalanche Technology Incorporated
• Original Assignee: Avalanche Technology Incorporated
• Inventors: Ranjan, Rajiv Yadav, Keshtbod, Parviz, Assar, Mahmud
• Primary Examiner(s): Luu, Pho M
• Assistant Examiner(s): BUI, THA-O H
• Application Number:
  US12/182,996
• Publication Number:
  US 20090046501A1
• Time in Patent Office: 1,301 Days
• Field of Search: 365/51, 365/63, 365/148, 365/154, 365/171, 365/173, 365/158
• US Class Current: 365/171
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G11C 11/15 using multiple magnetic layers G11C11/155 takes precedence
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements

Abstract

A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.

Claims

1. A flash-RAM memory comprising:

a non-volatile random access memory (RAM) including an array of magnetic memory cells and organized into at least two stacks of magnetic memory cells, each stack separated from another stack by a dielectric layer, the non-volatile RAM formed on a monolithic die, each of the magnetic memory cells of the non-volatile RAM including a magnetic tunnel junction (MTJ) made of a pinning layer on top of which is formed a fixed layer, on top of which is formed a tunnel layer, on top of which is formed a free layer;

a non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory being made of non-magnetic memory, the non-volatile page-mode memory and the non-volatile RAM residing on the same monolithic die, the non-volatile page-mode memory being operative to store data for reading; and

a plurality of transistors, isolated in a silicon area of the monolithic die, that is shared by the non-volatile RAM and the non-volatile page-mode memory, a single transistor of the plurality of transistors used to access a magnetic memory cell of the flash-RAM and a single transistor of the plurality of transistors used to access a page of the non-volatile page-mode memory,

wherein data is read, written and erased a page at a time to the non-volatile page-mode memory, with a page comprising a plurality of bits, whereas, the non-volatile pare-mode memory is written to and read from one bit at a time.

2. A flash-RAM memory, as recited in claim 1, wherein said non-volatile page-mode memory includes non-volatile magnetic memory made of an array of magnetic memory cells, each magnetic memory cells being made of a magnetic tunnel junction (MTJ).

3. The flash-RAM memory, as recited in claim 2, wherein at least one of the memory cells includes a diode formed on top of the MTJ, the diode being magnetic and made of an isolation layer on top of which is formed a silicon seeding layer, one or more Si-doped layers being formed on top of the silicon seeding layer and a barrier tunneling layer formed on top of the one or more Si-doped layers and a metallic magnetic layer formed on top of the barrier tunneling layer.

4. The flash-RAM memory, as recited in claim 2, wherein at least one of the memory cells includes a zener diode.

13. A flash-RAM memory, as recited in claim 1, wherein the free layer has a magnetization orientation that is in-plane relative to that of the monolithic die and switchable relative to the fixed layer.

14. A flash-RAM memory, as recited in claim 1, wherein the free layer has a magnetization orientation that is perpendicular relative to that of the monolithic die and switchable relative to the fixed layer.

15. A flash-RAM memory, as recited in claim 1, further including magnetic shielding layers inter-dispersed between the magnetic memory cells.

16. A flash-RAM memory, as recited in claim 15, wherein the magnetic shielding layers are made of Conetic allow comprising Ni—

Fe—

Cu—

Mo.

17. A flash-RAM memory, as recited in claim 1, wherein the dielectric layer is made of oxides or nitrides.

5. A computer system comprising:

a host; and

flash-RAM coupled to the host configured to store data, the flash-RAM including,

non-volatile random access memory (RAM) formed on a monolithic die that includes a silicon area, the non-volatile RAM including an array of magnetic memory cells and organized into at least two stacks of magnetic memory cells, each stack separated from another stack by a dielectric layer, the non-volatile RAM including a magnetic tunnel junction (MTJ) made of a pinning layer on top of which is formed a fixed layer, on top of which is formed a tunnel layer, on top of which is formed a free layer; and

non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory being made of non-magnetic memory, the non-volatile page-mode memory and the non-volatile RAM residing on the monolithic die, each of the non-volatile RAM and the non-volatile page-mode memory including magnetic memory cells made of a MTJ, the magnetic memory formed on the monolithic die, the non-volatile page-mode memory being operative to store data for reading thereof, wherein data is read, written and erased a page at a time, with a page comprising a plurality of bits, the non-volatile page-mode memory being addressed a page at a time whereas the flash-RAM being addressed a bit at a time, a page including more than one bit; and

a plurality of transistors coupled to the flash-RAM and the non-volatile page-mode memory and formed on an isolated part of the silicon area of the monolithic die thereby avoiding physical contact with the monolithic die, a single transistor of the plurality of transistors used to access a magnetic memory cell of the flash-RAM and a single transistor of the plurality of transistors used to access a page of the non-volatile page-mode memory.

6. A computer system as recited in claim 5 wherein the magnetic memory cells further include a thin-film diode coupled to the MTJ.

7. A computer system as recited in claim 5, wherein at least one of the magnetic memory cells includes a diode.

8. A computer system as recited in claim 5, wherein at least one of the magnetic memory cells includes a zener diode.

9. A computer system as recited in claim 5, wherein the flash-RAM is used to store boot code.

10. A computer system as recited in claim 5, wherein the flash-RAM is used to provide an instant-on system image of the hard disk drive, save data in case of a power-outage, and the like.

11. A computer system as recited in claim 5, wherein the flash-RAM is used to save data in case of a power-outage.

12. A computer system as recited in claim 5, wherein the memory elements comprise a one-time programmable memory.

18. A flash-RAM memory, as recited in claim 5, further including magnetic shielding layers inter-dispersed between the magnetic memory cells.

19. A flash-RAM memory, as recited in claim 18, wherein the magnetic shielding layers are made of Conetic allow comprising Ni—

Fe—

Cu—

Mo.