System and method for multi-rate concurrent waveform capture and storage for power quality metering
First Claim
1. In an intelligent electronic device, a method of performing high resolution waveform capture to generate multi-rate waveform data in real-time, the method comprising the steps of:
- a) setting a desired first sample rate;
b) reading an input digital stream of data sensed from an electrical power distribution system comprised of a plurality of time-ordered samples sampled at a second sample rate; and
c) pre-ordering the read input digital stream in real-time as it is being written to a memory to create multi-rate waveform data comprised of a first low resolution data stream comprised of low resolution samples from among samples of the input digital stream at said first sample rate and a second high resolution data stream comprised of high resolution samples from among samples of the input digital stream at said second sample rate.
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Accused Products
Abstract
Systems and methods are provided for use in an IED that perform high resolution waveform capture to generate multi-rate waveform data in real-time. In one embodiment, high-resolution sampled data is dynamically pre-ordered into separate high resolution and low resolution data streams for presentation and storage. This pre-ordering of data is optimized so as to minimize the amount of data manipulation required to prepare the sampled data for eventual presentation and storage in the IED. Pre-ordering of data facilitates minimum performance impact so that continuous real-time data capture can be achieved.
74 Citations
26 Claims
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1. In an intelligent electronic device, a method of performing high resolution waveform capture to generate multi-rate waveform data in real-time, the method comprising the steps of:
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a) setting a desired first sample rate; b) reading an input digital stream of data sensed from an electrical power distribution system comprised of a plurality of time-ordered samples sampled at a second sample rate; and c) pre-ordering the read input digital stream in real-time as it is being written to a memory to create multi-rate waveform data comprised of a first low resolution data stream comprised of low resolution samples from among samples of the input digital stream at said first sample rate and a second high resolution data stream comprised of high resolution samples from among samples of the input digital stream at said second sample rate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An intelligent electronic device comprising:
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means for setting a desired first sample rate; means for reading an input digital stream of data sensed from an electrical distribution system comprised of a plurality of time-ordered samples sampled at a second sample rate; and means for pre-ordering the read input digital stream in real-time as it is being written to a memory to create multi-rate waveform data comprised of a first low resolution data stream comprised of low resolution samples from among samples of the input digital stream at said first sample rate and a second high resolution data stream comprised of high resolution samples from among samples of the input digital stream at said second sample rate. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. An intelligent electronic device comprising:
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at least one analog-to-digital converter for sampling waveform data; a field programmable gate array (FPGA) for controlling the at least one analog-to-digital converter to sample the waveform data and for reading the sampled waveform data from the at least one analog-to-digital converter and for writing the sampled waveform data to a digital signal processor; the digital signal processor for receiving the sampled waveform data from the FPGA, for processing the received sampled waveform data and for storing the processed sampled waveform data in a memory; the memory for storing the processed sampled waveform data received from the digital signal processor; and a processor for reading the processed data from the memory for further processing, presentation and storage, wherein the FPGA is further configured to remap the processed data as pre-ordered data as it writes the data to the digital signal processor. - View Dependent Claims (22)
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23. An intelligent electronic device comprising:
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at least one analog-to-digital converter for sampling waveform data; a field programmable gate array (FPGA) for controlling the at least one analog-to-digital converter to sample the waveform data and for reading the sampled waveform data from the at least one analog-to-digital converter and for writing the sampled waveform data to a digital signal processor; the digital signal processor for receiving the sampled waveform data from the FPGA, for processing the received sampled waveform data and for storing the processed sampled waveform data in a memory; the memory for storing the processed sampled waveform data received from the digital signal processor; and a processor for reading the processed data from the memory for further processing, presentation and storage, wherein the digital signal processor remaps the processed sampled waveform data as it writes the data to the memory. - View Dependent Claims (24)
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25. An intelligent electronic device comprising:
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at least one analog-to-digital converter for sampling waveform data; a field programmable gate array (FPGA) for controlling the at least one analog-to-digital converter to sample the waveform data and for reading the sampled waveform data from the at least one analog-to-digital converter and for writing the sampled waveform data to at least one processor, wherein the FPGA remaps the sampled waveform data as pre-ordered data as it writes the data to the at least one processor; the at least one processor for receiving the sampled waveform data from the FPGA, for processing the received sampled waveform data and for storing the processed sampled waveform data in a memory; and the memory for storing the processed sampled waveform data received from the at least one processor.
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26. An intelligent electronic device comprising:
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at least one analog-to-digital converter for sampling waveform data; a field programmable gate array (FPGA) for controlling the at least one analog-to-digital converter to sample the waveform data and for reading the sampled waveform data from the at least one analog-to-digital converter and for writing the sampled waveform data to at least one processor; the at least one processor for receiving the sampled waveform data from the FPGA, for processing the received sampled waveform data and for storing the processed sampled waveform data in a memory, wherein the at least one processor remaps the processed sampled waveform data as it writes the data to the memory; and the memory for storing the processed sampled waveform data received from the at least one processor.
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Specification