Integrated circuit transformer devices for on-chip millimeter-wave applications

• US 8,122,393 B2
• Filed: 04/21/2008
• Issued: 02/21/2012
• Est. Priority Date: 04/08/2005
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Goren, David, Pfeiffer, Ullrich R., Sheinman, Benny, Shlafman, Shlomo
• Primary Examiner(s): DO, THUAN V
• Application Number:
  US12/106,531
• Publication Number:
  US 20080195988A1
• Time in Patent Office: 1,401 Days
• Field of Search: 716/55, 716/126, 716/139
• US Class Current: 716/55
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H03F 3/26 Push-pull amplifiers; Phase-splitters therefor duplicated single-ended push-pull arrangements or phase-splitters therefor H03F3/30
• CPC Class Codes: H03F 3/45089 Non-folded cascode stages
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers

Abstract

Methods are provided for building integrated circuit transformer devices having compact and optimized architectures for use in MMW (millimeter-wave) applications. The integrated circuit transformer devices have universal and scalable architectures that can be used as templates or building blocks for constructing various types of on-chip devices for millimeter-wave applications.

Claims

1. A method of fabricating a semiconductor device, comprising:

providing a substrate having a substrate surface in a lateral plane;

forming a layer of conductive material on the substrate surface;

patterning the layer of conductive material to form a ground shield comprising a plurality of close-ended parallel elongated slots extending in a first direction and edge regions having a plurality of longitudinal slots extending in a second direction substantially perpendicular to the first direction and disposed adjacent to ends of the close-ended parallel elongated slots; and

forming a primary conductor and a secondary conductor disposed above the ground shield, wherein the primary conductor and the secondary conductor lie in respective different planes and have substantially parallel longitudinal axes extending in a first direction perpendicular to the lateral plane, wherein the primary conductor and the secondary conductor form a coupled-wire structure.

2. The method of claim 1, wherein the ground shield, primary conductor and secondary conductor are formed on different layers of an integrated circuit to form a stacked transformer device.

3. The method of claim 2, wherein the ground shield, the primary conductor and secondary conductor are formed from different metallization layers using a back end of line process.

4. The method of claim 1, further comprising encapsulating the coupled-wire structure in a dielectric material.