Semiconductor device and method for manufacturing the semiconductor device

• US 8,129,719 B2
• Filed: 08/28/2009
• Issued: 03/06/2012
• Est. Priority Date: 09/01/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Akimoto, Kengo
• Primary Examiner(s): Sandvik, Benjamin
• Assistant Examiner(s): Schoenholtz, Joseph
• Application Number:
  US12/549,415
• Publication Number:
  US 20100051940A1
• Time in Patent Office: 921 Days
• Field of Search: None
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02318 post-treatment
• CPC Class Codes: H01L 21/02323 introduction of oxygen
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

Claims

1. A semiconductor device comprising:

a thin film transistor, the thin film transistor comprising;

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

source and drain regions over the oxide semiconductor layer; and

source and drain electrode layers over the source and drain regions,

wherein there is a peak of an oxygen concentration at an interface between the gate insulating layer and the oxide semiconductor layer,

wherein an oxygen concentration of the gate insulating layer has a concentration gradient,

wherein the oxygen concentration is increased toward the interface between the gate insulating layer and the oxide semiconductor layer, and

wherein the oxygen concentration of the oxide semiconductor layer is higher than oxygen concentrations of the source and drain regions.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer and the source and drain regions are oxide semiconductor layers including indium, gallium, and zinc.

3. A semiconductor device comprising:

a thin film transistor, the thin film transistor comprising;

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

source and drain regions over the oxide semiconductor layer; and

source and drain electrode layers over the source and drain regions,

wherein there is a peak of an oxygen concentration at an interface between the gate insulating layer and the oxide semiconductor layer,

wherein oxygen concentrations of the gate insulating layer and the oxide semiconductor layer each have a concentration gradient,

wherein the oxygen concentration is increased toward the interface between the gate insulating layer and the oxide semiconductor layer, and

wherein the oxygen concentration of the oxide semiconductor layer is higher than oxygen concentrations of the source and drain regions.

4. The semiconductor device according to claim 3, wherein the oxide semiconductor layer and the source and drain regions are oxide semiconductor layers including indium, gallium, and zinc.

5. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

exposing the gate insulating layer to oxygen radical so as to be reformed;

forming an oxide semiconductor layer over the gate insulating layer reformed;

forming source and drain regions over the oxide semiconductor layer; and

forming source and drain electrode layers over the source and drain regions,

wherein the gate insulating layer and the oxide semiconductor layer are formed successively without being exposed to the air, and

wherein the oxygen concentration of the oxide semiconductor layer is higher than oxygen concentrations of the source and drain regions.

6. The method for manufacturing a semiconductor device, according to claim 5, wherein the gate insulating layer, the oxide semiconductor layer, the source and drain regions, and the source and drain electrode layers are formed by a sputtering method.

7. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

exposing the gate insulating layer to oxygen radical so as to be reformed;

forming an oxide semiconductor layer over the gate insulating layer reformed;

forming source and drain regions over the oxide semiconductor layer;

heating the oxide semiconductor layer and the source and drain regions at a temperature of 200°

C. to 600°

C., inclusive; and

forming source and drain electrode layers over the source and drain regions,

wherein the gate insulating layer and the oxide semiconductor layer are formed successively without being exposed to the air, and

wherein the oxygen concentration of the oxide semiconductor layer is higher than oxygen concentrations of the source and drain regions.

8. The method for manufacturing a semiconductor device, according to claim 7, wherein the gate insulating layer, the oxide semiconductor layer, the source and drain regions, and the source and drain electrode layers are formed by a sputtering method.