Diode having reduced on-resistance and associated method of manufacture
First Claim
1. A laterally conductive diode comprising:
- a first doped semiconductor layer having a first surface;
a semiconductor mesa on said first surface of said first doped layer, said semiconductor mesa comprising an intrinsic semiconductor region and a region having a different conductivity type from said first doped layer, wherein said intrinsic semiconductor region is located between said first doped semiconductor layer and said region having a different conductivity type;
a top ohmic contact on said mesa;
a nonconductive mesa sidewall spacer only on a side of said mesa between said first surface of said first doped layer and the top of said mesa; and
a lateral ohmic contact extending across at least a portion of said first surface of said first doped layer, said lateral ohmic contact conducting a current from said top ohmic contact laterally across said first doped layer.
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Accused Products
Abstract
A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.
19 Citations
37 Claims
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1. A laterally conductive diode comprising:
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a first doped semiconductor layer having a first surface; a semiconductor mesa on said first surface of said first doped layer, said semiconductor mesa comprising an intrinsic semiconductor region and a region having a different conductivity type from said first doped layer, wherein said intrinsic semiconductor region is located between said first doped semiconductor layer and said region having a different conductivity type; a top ohmic contact on said mesa; a nonconductive mesa sidewall spacer only on a side of said mesa between said first surface of said first doped layer and the top of said mesa; and a lateral ohmic contact extending across at least a portion of said first surface of said first doped layer, said lateral ohmic contact conducting a current from said top ohmic contact laterally across said first doped layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A PIN diode comprising:
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an n+ type doped semiconductor layer having a first surface; an intrinsic semiconductor layer on said first surface of said n+ semiconductor layer for controlling the current through the diode; a p+ semiconductor layer on said intrinsic layer opposite said n+ type doped semiconductor layer; a top ohmic contact on said p+ type semiconductor layer; a lateral ohmic contact on said first surface of said n+ type semiconductor layer, said lateral ohmic contact positioned proximate to said intrinsic layer and said p+ layer, wherein the PIN diode conducts a current from said top ohmic contact to said lateral ohmic contact across said n+ layer; and a sidewall spacer on at least one side of both said intrinsic layer and said p+ layer, wherein said sidewall spacer is limited to the side or sides of both said intrinsic layer and said p+ layer and faces said lateral ohmic contact to prevent short circuiting between said top ohmic contact and said lateral ohmic contact. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A laterally conductive diode comprising:
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a first doped semiconductor layer having a first surface; a semiconductor mesa on said first surface of said first doped layer; a top ohmic contact on said mesa; a nonconductive mesa sidewall spacer only on a side of said mesa between said first surface of said first doped layer and the top of said mesa; and a lateral ohmic contact extending across at least a portion of said first surface of said first doped layer, said lateral ohmic contact conducting a current from said top ohmic contact laterally across said first doped layer. - View Dependent Claims (32, 33, 34, 35, 36, 37)
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Specification