Method and apparatus for decoding transmission signals in a wireless communication system

• US 8,139,652 B2
• Filed: 12/29/2006
• Issued: 03/20/2012
• Est. Priority Date: 12/29/2005
• Status: Active Grant

• Current Assignee: Technology In Ariscale, LLC
• Original Assignee: SeAH Networks Co., Ltd. (SEAH Holdings Corporation)
• Inventors: Lee, Kang-min, Kang, Sung-Jin
• Primary Examiner(s): Bayard, Emmanuel
• Application Number:
  US12/158,559
• Publication Number:
  US 20080279297A1
• Time in Patent Office: 1,908 Days
• Field of Search: 375/242, 375/260, 375/262, 375/265, 375/341
• US Class Current: 375/242
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 1/0072 Error control for data other than payload data, e.g. control data
• CPC Class Codes: H04L 1/08 by repeating transmission, e.g. Verdan system H04L1/1858 and H04L1/189 take precedence
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01

Abstract

Disclosed is a method and an apparatus for decoding transmission signal. The method includes the steps of: receiving transmission signal including repeated symbols; deinterleaving the received signal; mutually combining the repeated symbols in the deinterleaved signal; and decoding the combined symbols. According to the method, reception performance is improved as compared to a conventional decoding method, and system performance is improved by reducing the loss of frame information included in an FCH.

Claims

1. A computer-implemented method for decoding a transmission signal, the method comprising:

receiving, using a computer processor, the transmission signal, which is formed by repeating symbols including downlink frame prefix information, encoding repeated symbols to form encoding blocks, and interleaving the encoding blocks;

deinterleaving, using a computer processor, the received transmission signal;

combining, using a computer processor, symbols at the same positions of deinterleaved encoding blocks among the repeated symbols in the deinterleaved transmission signal; and

decoding, using a computer processor, the combined symbols.

3. The computer-implemented method as claimed in claim 1 or 2, wherein the repeated symbols included in the transmission signal are formed through a repetition process of symbols before encoding in a transmitter.

4. The computer-implemented method as claimed in claim 3, wherein the repeated symbols correspond to information transmitted using a frame control header (FCH).

5. The computer-implemented method as claimed in claim 4, wherein the repeated symbols include configuration information of a corresponding frame.

6. The computer-implemented method as claimed in claim 3, wherein the combining of the repeated symbols comprises adding and averaging the repeated symbols.

7. The computer-implemented method as claimed in claim 6, further comprising;

repeating the averaged symbols after averaging the repeated symbols.

8. The computer-implemented method as claimed in claim 3, wherein the transmission signal is a downlink signal in an IEEE 802.16e-based wireless communication system.

9. The computer-implemented method as claimed in claim 8, wherein the IEEE 802.16e-based wireless communication system employs orthogonal frequency division multiplexing access (OFDMA) and time division duplexing (TDD) schemes.

2. A computer-implemented method for decoding a transmission signal, the method comprising:

receiving, using a computer processor, the transmission signal, which is formed by repeating symbols including downlink frame prefix information, encoding repeated symbols to form encoding blocks, and interleaving the encoding blocks;

combining, using a computer processor, symbols at the same combination positions of interleaved encoding blocks among the repeated symbols in the received signal;

deinterleaving, using a computer processor, the combined symbols; and

decoding, using a computer processor, the deinterleaved symbols.

10. A computer-implemented method for transmitting/receiving a downlink signal in a wireless communication system, the method comprising:

forming, using a computer processor, two N-bit blocks by repeating an N-bit block including N symbols including downlink frame prefix information, N being a positive integer;

forming, using a computer processor, an encoded signal of two NM-bit blocks by encoding the two N-bit blocks by a code rate of 1/M, M being a positive real number;

interleaving, using a computer processor, the encoded signal to form an interleaved output of two NM-bit blocks;

allocating, using a computer processor, the interleaved output to an FCH, and transmitting the FCH using the downlink signal;

receiving, using a computer processor, the downlink signal;

forming, using a computer processor, a deinterleaved output of the two NM-bit blocks by deinterleaving the received downlink signal;

combining and averaging, using a computer processor, symbols at the same positions of the two NM-bit blocks of the deinterleaved output;

reconfiguring, using a computer processor, two NM-bit blocks by repeating the averaged symbols;

restoring, using a computer processor, two N-bit blocks by decoding the deinterleaved output of the reconfigured two NM-bit blocks; and

obtaining, using a computer processor, the downlink frame information from the restored N-bit blocks.

12. The computer-implemented method as claimed in claim 10 or 11, wherein the wireless communication system is an IEEE 802.16e-based wireless communication system.

13. The computer-implemented method as claimed in claim 12, wherein the IEEE 802.16e-based wireless communication system employs OFDMA and TDD schemes.

11. A computer-implemented method for transmitting/receiving a downlink signal in a wireless communication system, the method comprising:

forming, using a computer processor, two N-bit blocks by repeating an N-bit block including N symbols having downlink frame prefix information, N being a positive integer;

forming, using a computer processor, an encoded signal of two NM-bit blocks by encoding the two N-bit blocks by a code rate of 1/M, M being a positive real number;

interleaving, using a computer processor, the encoded input signal to form an interleaved output of two NM-bit blocks;

allocating, using a computer processor, the interleaved output to an FCH, and transmitting the FCH using the downlink signal;

receiving, using a computer processor, the downlink signal including the FCH to which the two NM-bit blocks are allocated;

combining and averaging, using a computer processor, repeated symbols at the same combination positions in the two NM-bit blocks included in the received downlink signal;

reconfiguring, using a computer processor, two NM-bit blocks by repeating the averaged symbols;

forming, using a computer processor, a deinterleaved output by deinterleaving the reconfigured two NM-bit blocks;

restoring, using a computer processor, two N-bit blocks by decoding the deinterleaved output; and

obtaining, using a computer processor, the downlink frame prefix information from the restored N-bit blocks.

14. A receiver comprising:

a deinterleaver configured to deinterleave a transmission signal, which is formed by repeating symbols including downlink frame prefix information, encoding repeated symbols to form encoding blocks, and interleaving the encoding blocks;

a combiner configured to combine symbols at the same positions of deinterleaved encoding blocks among the repeated symbols in the deinterleaved signal; and

a decoder configured to decode the combined symbols.

16. The receiver as claimed in claim 14 or 15, wherein the repeated symbols included in the transmission signal are formed through a repetition process of symbols before encoding in a transmitter.

17. The receiver as claimed in claim 16, wherein the repeated symbols correspond to information transmitted using an FCH.

18. The receiver as claimed in claim 17, wherein the repeated symbols include configuration information of a corresponding frame.

19. The receiver as claimed in claim 16, wherein the combiner adds and averages the repeated symbols.

20. The receiver as claimed in claim 19, wherein the combiner repeats the averaged symbols.

21. The receiver as claimed in claim 16, wherein the transmission signal is a downlink signal in an IEEE 802.16e-based wireless communication system.

22. The receiver as claimed in claim 21, wherein the IEEE 802.16e-based wireless communication system employs OFDMA and TDD schemes.

15. A receiver comprising:

a combiner for configured to combine symbols at the same combination positions of interleaved encoding blocks among repeated symbols in a transmission signal, which is formed by repeating symbols including downlink frame prefix information, encoding repeated symbols to form encoding blocks, and interleaving the encoding blocks;

a deinterleaver configured to deinterleave the transmission signal including the combined symbols; and

a decoder configured to decode the deinterleaved transmission signal.

23. A wireless communication system comprising:

a transmitter; and

a receiver,

wherein the transmitter comprises;

a repetition unit configured to form two N-bit blocks by repeating an N-bit block including N symbols including downlink frame prefix information, N being a positive integer;

an encoding unit configured to form an encoded signal of two NM-bit blocks by encoding the two N-bit blocks by a code rate of 1/M, M being a positive real number;

an interleaving unit configured to interleave the encoded signal to form an interleaved output of two NM-bit blocks; and

a transmission unit configured to allocate the interleaved output to an FCH, and transmit the FCH using a downlink signal, and

wherein the receiver comprises;

a reception unit configured to receive the downlink signal;

a deinterleaving unit configured to form a deinterleaved output of two NM-bit blocks by deinterleaving the received downlink signal;

a combining unit configured to combine repeated symbols at the same positions of the two NM-bit blocks of the deinterleaved output; and

a decoding unit configured to restore two N-bit blocks by decoding the two combined NM-bit blocks.

25. The wireless communication system as claimed in claim 23 or 24, wherein a block allocated to the FCH and transmitted by the transmission unit in the transmitter includes configuration information of a corresponding frame, and the decoding unit of the receiver obtains the configuration information from the restored two N-bit blocks.

26. The wireless communication system as claimed in claim 25, wherein the combining unit in the receiver adds and averages the repeated symbols, and repeats the averaged symbols.

27. The wireless communication system as claimed in claim 26, wherein the wireless communication system is an IEEE 802.16e-based wireless communication system, and employs OFDMA and TDD schemes.

24. A wireless communication system comprising:

a transmitter; and

a receiver,

wherein the transmitter comprises;

a repetition unit configured to form two N-bit blocks by repeating an N-bit block including N symbols including downlink frame prefix information, N being a positive integer;

an encoding unit configured to form an encoded signal of two NM-bit blocks by encoding the two N-bit blocks by a code rate of 1/M, M being a positive real number;

an interleaving unit configured to interleave the encoded signal to form an interleaved output of two NM-bit blocks; and

a transmission unit configured to allocate the interleaved output to an FCH, and transmit the FCH using a downlink signal, and

wherein the receiver comprises;

a reception unit configured to receive the downlink signal;

a combining unit configured to combine repeated symbols at the same positions of the two NM-bit blocks included in the received downlink signal;

a deinterleaving unit configured to form a deinterleaved output of two NM-bit blocks by deinterleaving the combined two NM-bit blocks; and

a decoding unit configured to restore two N-bit blocks by decoding the deinterleaved output.