Closed galois field cryptographic system

• US 8,139,764 B2
• Filed: 05/06/2008
• Issued: 03/20/2012
• Est. Priority Date: 05/06/2008
• Status: Active Grant

• Current Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Chester, David B., Michaels, Alan J.
• Primary Examiner(s): Pearson, David
• Assistant Examiner(s): HOLMES, ANGELA R
• Application Number:
  US12/116,104
• Publication Number:
  US 20090279688A1
• Time in Patent Office: 1,414 Days
• Field of Search: 714/781, 380/28, 370/326, 708/492
• US Class Current: 380/28
• CPC Class Codes: H04L 2209/04 Masking or blinding
• CPC Class Codes: H04L 2209/34 Encoding or coding, e.g. Huffman coding or error correction
• CPC Class Codes: H04L 9/0668 producing a non-linear pseudorandom sequence

Abstract

A cryptographic system (CS) comprised of generators (502), (504), (510), an encryption device (ED), and a decryption device (DD). The generator (502) generates a data sequence (DS) including payload data. The generator (504) generates an encryption sequence (ES) including random numbers. The ED (506) is configured to perform a CGFC arithmetic process. As such, the ED is comprised of a mapping device (MD) and an encryptor. The MD is configured to map the DS and ES from Galois field GF[p^k] to Galois extension field GF[p^k+1]. The encryptor is configured to generate an encrypted data sequence (EDS) by combining the DS and ES utilizing a Galois field multiplication operation in Galois extension field GF[p^k+1]. The generator (510) is configured to generate a decryption sequence (DS). The DD (508) is configured to generate a decrypted data sequence by performing an inverse of the CGFC arithmetic process utilizing the EDS and DS.

Claims

1. A method for encrypting a data sequence, comprising the steps of:

generating, by an electronic circuit, a payload data sequence comprising a plurality of first digits expressed as members of a Galois field GF[p^k];

generating, by an electronic circuit, an encryption sequence comprising a plurality of second digits expressed as members of said Galois field GF[p^k];

mapping, by an electronic circuit, said payload data sequence and said encryption sequence from said Galois field GF[p^k] to a Galois extension field GF[p^k+1], said mapping achieved by performing a first Affine transformation using said plurality of first digits and a second Affine transformation using said plurality of second digits; and

generating, by an electronic circuit, an encrypted data sequence by performing a CGFC arithmetic process, said CGFC arithmetic process including combining first results of said first Affine transformation with second results of said second Affine transformation;

wherein said first results and said second results are combined using a Galois field multiplication operation in said Galois extension field GF[p^k+1], where p is a prime number, k is an integer value, and p^k+1 defines a finite field size of said Galois extension field GF[p^k+1].

2. The method according to claim 1, further comprising selecting random numbers of said encryption sequence to be pseudo-random numbers or pseudo-chaotic random numbers.

3. The method according to claim 1, further comprising expressing said data sequence and said encryption sequence in a p-adic number system representation or a mixed-radix number system representation.

4. The method according to claim 1, further comprising selecting each of said data sequence and said encryption sequence to be comprised of at least two digits expressed in a weighted number system.

5. The method according to claim 1, further comprising combining said data sequence and said encryption sequence by selectively performing a plurality of Galois field multiplication operations using a distinct subset of digits from each of said data sequence and said encryption sequence.

6. The method according to claim 1, further comprising generating a decryption sequence comprising random numbers and expressed in a Galois field GF[p^k].

7. The method according to claim 6, further comprising selecting said random numbers of said decryption sequence to be pseudo-random numbers or pseudo-chaotic random numbers.

8. The method according to claim 6, wherein said decryption sequence is an inverted sequence based on said encryption sequence.

9. The method according to claim 6, generating a decrypted data sequence by performing an inverse of said CGFC arithmetic process utilizing said encrypted data sequence and said decryption sequence.

10. A device comprising a machine-readable non-transitory medium, having stored thereon a computer program for data communication, the computer program having a plurality of code sections, the code sections executable by a processor to cause the processor to perform the steps of:

generating a payload data sequence comprising a plurality of first digits expressed as members of a Galois field GF[p^k];

generating an encryption sequence comprising a plurality of second digits expressed as members of said Galois field GF[p^k];

mapping said payload data sequence and said encryption sequence from said Galois field GF[p^k] to a Galois extension field GF[p^k+1], said mapping achieved by performing a first Affine transformation using said plurality of first digits and a second Affine transformation using a plurality of second digits; and

generating an encrypted data sequence by performing a CGFC arithmetic process, said CGFC arithmetic process including combining first results of said first Affine transformation with second results of said second Affine transformation;

wherein said first results and said second results are combined using a Galois field multiplication operation in said Galois extension field GF[p^k+1], where p is a prime number, k is an integer value, and p^k+1 defines a finite field size of said Galois extension field GF[p^k+1].

11. The device according to claim 10, further comprising instructions to cause the processor to combine said data sequence and said encryption sequence by selectively performing a plurality of Galois field multiplication operations using a distinct subset of digits from each of said data sequence and said encryption sequence.

12. The device according to claim 10, further comprising instructions to cause the process to receive a signal comprising said encrypted data sequence and generate a decryption sequence comprising random numbers and expressed in said Galois field GF[p^k] subsequent to receiving said signal.

13. The device according to claim 12, further comprising instructions to cause the processor to generate a decrypted data sequence by performing an inverse of said CGFC arithmetic process utilizing said encrypted data sequence and said decryption sequence.

14. A closed Galois field cryptographic (CGFC) system, comprising:

a first generator configured to generate a payload data sequence comprising a plurality of first digits expressed as members of a Galois field GF[p^k];

a second generator configured to generate an encryption sequence comprising a plurality of second digits expressed as members of a Galois field GF[p^k]; and

an encryption device coupled to said first and second generators and configured to perform a CGFC arithmetic process, said encryption device comprising

(a) a mapping device configured to map said payload data sequence and said encryption sequence from said Galois field GF[p^k] to a Galois extension field GF[p^k+1], said mapping achieved by performing a first Affine transformation using said plurality of first digits and a second Affine transformation using said plurality of second digits, and

(b) an encryptor configured to generate an encrypted data sequence by combining first results of said first Affine transformation with second results of said second Affine transformation;

wherein said first results and said second results are combined using a Galois field multiplication operation in said Galois extension field GF[p^k+1], where p is a prime number, k is an integer value, p^k is defines a finite field size of said Galois field GF[p^k], and p^k+1 defines a finite field size of said Galois extension field GF[p^k+1].

15. The CGFC system according to claim 14, wherein said encryptor is further configured to combine said data sequence and said encryption sequence by selectively performing a plurality of Galois field multiplication operations using a distinct subset of digits from each of said data sequence and said encryption sequence.

16. The CGFC system according to claim 14, wherein said encryption sequence is a pseudo random number sequence or a pseudo-chaotic random number sequence.

17. The CGFC system according to claim 14, further comprising a third generator configured to generate a decryption sequence expressed in a Galois field GF[p^k].

18. The CGFC system according to claim 17, wherein said decryption sequence is comprised of pseudo-random numbers or pseudo-chaotic random numbers.

19. The CGFC system according to claim 17, wherein said decryption sequence is an inverted sequence based on said encryption sequence.

20. The CGFC system according to claim 17, further comprising a decryption device coupled to said third generator and configured to generate a decrypted data sequence by performing an inverse of said CGFC arithmetic process utilizing said encrypted data sequence and said decryption sequence.