System, method, and computer program product for inserting a gap in information sent from a drive to a host device

• US 8,140,712 B2
• Filed: 07/17/2009
• Issued: 03/20/2012
• Est. Priority Date: 07/17/2009
• Status: Expired due to Fees

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: SandForce, Inc. (Broadcom, Inc.)
• Inventors: Stenfort, Ross John
• Primary Examiner(s): Lee, Chun-Kuan
• Assistant Examiner(s): MODO, RONALD T
• Application Number:
  US12/505,333
• Publication Number:
  US 20110016233A1
• Time in Patent Office: 977 Days
• Field of Search: 710/5
• US Class Current: 710/5
• CPC Class Codes: G06F 13/126 and has means for transferring I/O instructions and statuses between control unit and main processor
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0671 In-line storage system

Abstract

A system, method, and computer program product are provided for inserting a gap in information sent from a drive to a host device. In operation, one or more commands are received at a drive from a host device. Additionally, information is queued to send to the host device. Furthermore, a gap is inserted in the information to send to the host device such that the host device is capable of sending additional commands to the drive.

Claims

1. A method, comprising:

receiving one or more commands at a drive from a host device, the host device and the drive communicating via a storage protocol comprising DMA data phases wherein the drive is enabled to prevent the host device from sending additional commands to the drive;

queuing information to send to the host device;

determining, as a function of drive state and independent of current host signaling, whether to insert a gap in the information to send to the host device, such that the gap is between respective data of a consecutive two of the DMA data phases and that the host device is enabled to send the additional commands to the drive;

conditionally inserting the gap based on the determining and otherwise not inserting the gap; and

wherein the function of drive state comprises a function of a current queue depth of the drive.

2. The method of claim 1, wherein the information to send to the host includes setup information and data associated with at least one of the one or more commands.

3. The method of claim 2, wherein the setup information includes a direct memory access (DMA) frame information structure (FIS).

4. The method of claim 2, wherein the setup information includes a set device bit FIS.

5. The method of claim 2, wherein a time delay is inserted before sending the setup information.

6. The method of claim 2, wherein a time delay is inserted after sending the setup information.

7. The method of claim 1, further comprising receiving the additional commands at the drive from the host device during a time delay.

8. The method of claim 1, wherein inserting the gap includes inserting a time delay during a period when the information is being sent to the host device.

9. The method of claim 1, wherein the gap is not inserted in response to the current queue depth equaling zero.

10. The method of claim 1, wherein the function of drive state comprises a function of an amount of time since a previous command was received.

11. The method of claim 8, wherein a length of time of the time delay is based on the current queue depth of the drive.

12. The method of claim 8, wherein a length of time of the time delay is based on an amount of time since a previous command was received by the drive.

13. The method of claim 1, wherein at least one of a length of time of a time delay or a point when the time delay is inserted is determined in real time.

14. The method of claim 1, wherein at least one of a length of time of a time delay or a point when the time delay is inserted is a predetermined value.

15. The method of claim 1, wherein the information to send to the host includes setup information including additional information indicating a time delay is following the setup information.

16. The method of claim 1, wherein the information to send to the host includes status information and a time delay is inserted before sending the status information.

17. The method of claim 1, wherein inserting the gap includes inserting additional information.

18. The method of claim 1, wherein the host device is informed about the gap in advance of the gap.

19. The method of claim 1, wherein the drive includes a Serial ATA (SATA) drive.

20. A computer program product embodied on a computer readable medium, comprising:

computer code for receiving one or more commands at a drive from a host device, the host device and the drive communicating via a storage protocol comprising DMA data phases wherein the drive is enabled to prevent the host device from sending additional commands to the drive;

computer code for queuing information to send to the host device;

computer code for determining, as a function of a current queue depth of the drive and independent of current host signaling, whether to insert a gap in the information to send to the host device such that the gap is between respective data of a consecutive two of the DMA data phases and that the host device is enabled to send the additional commands to the drive; and

computer code for conditionally inserting the gap based on the determining and otherwise not inserting the gap.

21. An apparatus, comprising:

a drive enabled to receive one or more commands from a host device, the host device and the drive enabled to communicate via a storage protocol comprising DMA data phases wherein the drive is enabled to prevent the host device from sending additional commands to the drive;

a buffer enabled to queue information to send to the host device; and

a controller enabled to make a determination, as a function of a current queue depth of the buffer and independent of current host signaling, whether to insert a gap in the information to send to the host device, such that the gap is between respective data of a consecutive two of the DMA data phases and that the host device is enabled to send the additional commands to the drive, the controller being further enabled to conditionally insert the gap based on the determination and to otherwise not insert the gap.