Decentralized radio frequency identification system
First Claim
1. A decentralized RFID system comprising:
- a first reader for transmitting a first carrier signal;
a second reader for transmitting a second carrier signal;
a tag for receiving the first and second carrier signals, wherein the tag is responsive to the first carrier signal to transmit a first backscatter signal, and wherein the tag is responsive to the second carrier signal to transmit a second backscatter signal; and
wherein the first and second readers further include a first processor and a second processors, respectively, and wherein the first processor measures a degree of interference from the second carrier signal, and wherein the second processor measures a degree of interference from the first carrier signal, the first and second processor each executing instructions to;
adjust a respective transmission power level of the first and second carrier signals being transmitted from the first and second readers, respectively, as a function of the measured degree of interference;
calculate a new transmission power level of the corresponding first and second readers based on the degree of interference measured at the first and second readers and an estimated channel behavior at a next time step, wherein the new transmission power level is controlled such that an expected signal-to-noise ratio reaches a signal-to-noise ratio required for a desired reading range for the first and second readers,wherein a selective back-off scheme is employed by each of the first and second readers to ensure that both the first and second readers achieve a respective desired read range, the selective back-off scheme;
determining on a percentage of time the first and second readers achieve a respective desired read range based on time a respective first or second reader has attained the required signal-to-noise ratio;
executing an algorithm that uses a logarithm function of the percentage of time to determine an amount of time for each of the first and second readers to wait before return to the respective transmission power levels, the algorithm comprising;
τ
w=10·
[log10(ρ
+0.01)+2]wherein ρ
is the percentage of time a respective first and second reader has attained the required signal-to-noise ratio and τ
W is the amount of time a respective first and second readers to wait before return to the respective transmission power levels.
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Abstract
A decentralized RFID system and method provides a decentralized power control scheme for adaptively adjusting the power of a RFID reader in a network of readers communicating with an RFID tag. The transmission power of each reader in a dense network environment is controlled as a function of interference sensed from other readers in the network and a current SNR (SNR) of a backscatter signal received from the tag. If the current SNR is above a required SNR, transmission power of the reader is reduced, which results in lower interference for other RFID readers. Similarly, if the expected SNR is below the required threshold, power is increased sufficiently to ensure that the target or required SNR is achieved.
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Citations
12 Claims
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1. A decentralized RFID system comprising:
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a first reader for transmitting a first carrier signal; a second reader for transmitting a second carrier signal; a tag for receiving the first and second carrier signals, wherein the tag is responsive to the first carrier signal to transmit a first backscatter signal, and wherein the tag is responsive to the second carrier signal to transmit a second backscatter signal; and wherein the first and second readers further include a first processor and a second processors, respectively, and wherein the first processor measures a degree of interference from the second carrier signal, and wherein the second processor measures a degree of interference from the first carrier signal, the first and second processor each executing instructions to; adjust a respective transmission power level of the first and second carrier signals being transmitted from the first and second readers, respectively, as a function of the measured degree of interference; calculate a new transmission power level of the corresponding first and second readers based on the degree of interference measured at the first and second readers and an estimated channel behavior at a next time step, wherein the new transmission power level is controlled such that an expected signal-to-noise ratio reaches a signal-to-noise ratio required for a desired reading range for the first and second readers, wherein a selective back-off scheme is employed by each of the first and second readers to ensure that both the first and second readers achieve a respective desired read range, the selective back-off scheme; determining on a percentage of time the first and second readers achieve a respective desired read range based on time a respective first or second reader has attained the required signal-to-noise ratio; executing an algorithm that uses a logarithm function of the percentage of time to determine an amount of time for each of the first and second readers to wait before return to the respective transmission power levels, the algorithm comprising;
τ
w=10·
[log10(ρ
+0.01)+2]wherein ρ
is the percentage of time a respective first and second reader has attained the required signal-to-noise ratio and τ
W is the amount of time a respective first and second readers to wait before return to the respective transmission power levels.- View Dependent Claims (2, 3, 4, 5, 6)
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7. A processor having executable components for adjusting a transmission power level of at least one radio frequency identification (RFID) reader in a decentralized RFID system, the decentralized RFID system comprising a first reader to transmit a first carrier signal at a first power level;
- a second reader to transmit a second carrier signal at a second power level, and a tag to receive the first and second carrier signals and to generate, at the tag, a first backscatter signal in response to the first carrier signal and a second backscatter in response to the second carrier signal, the processor comprising;
a power update component to determine a current transmission power corresponding to the first carrier signal and to calculate a current signal-to-noise ratio value based on the current transmission power level and signal-to-noise ratio data retrieved from a memory; a signal-to-noise ratio comparator component to compare the current signal-to-noise value to a required signal-to-noise value retrieved from the memory and to generate a first output signal as a function of the comparison; a percentage signal-to-noise ratio achieved component to calculate a back-off parameter as a function of the first output signal, wherein the back-off parameter corresponds to a percentage of time the required signal-to-noise ratio is achieved; wherein the power update component is further responsive to the first generated output signal to calculate a new transmission power required to achieve the desired signal-to-noise ratio; a limiter component to receive the new transmission power and to limit the new calculated transmission power within a specified transmission power range; a power comparator component to receive the new transmission power thru the limiter component, to compare the new transmission power to a maximum transmission power value retrieved from the memory, and to generate a second output signal as a function of the comparison; and a selective back-off component is responsive to the second output signal from the power comparator component, the new transmission power received thru the limiter, and the back-off parameter from the percentage signal-to-noise ratio achieved component to determine whether to operate the first reader in a normal mode or a selective back-off mode, wherein the first reader outputs the new transmission power for generating the first carrier signal during normal mode, and wherein the first reader waits for a determined time period before outputting the new transmission power during the back-off mode. - View Dependent Claims (8, 9, 10, 11, 12)
- a second reader to transmit a second carrier signal at a second power level, and a tag to receive the first and second carrier signals and to generate, at the tag, a first backscatter signal in response to the first carrier signal and a second backscatter in response to the second carrier signal, the processor comprising;
Specification