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Dot-matrix display refresh charging/discharging control method and system

  • US 8,144,098 B2
  • Filed: 06/12/2008
  • Issued: 03/27/2012
  • Est. Priority Date: 10/30/2007
  • Status: Expired due to Fees
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1. A dot-matrix display data refresh charging/discharging control system for integration to a dot-matrix display device of the type having an array of pixels which are capable of displaying particular color values by charging with particular data voltages, and which are interconnected with a scan line bus and a data line bus, and each include a capacitive circuit connected between a charge/discharge node and a grounding point for holding data voltage charge;

  • the dot-matrix display data refresh charging/discharging control system comprising;

    a charge-neutralization control module, which is capable of sequentially generating a sequence of charge-neutralizing control signals;

    a first charging control switch, which is integrated to a first pixel in an adjacent pair of pixels in the dot-matrix display device, and which has a gate, a source, and a drain; and

    whose gate is connected to a first scan line in the scan line bus;

    whose source is connected to a corresponding data line in the data line bus; and

    whose drain is connected to the capacitive circuit of the first pixel; and

    which is capable of being switched on by activation on the associated scan line to allow a data voltage on the associated data line to be charged to the capacitive circuit of the first pixel;

    a second charging control switch, which is integrated to a second pixel in the adjacent pair of pixels, and which has a gate, a source, and a drain; and

    whose gate is connected to a second scan line in the scan line bus;

    whose source is connected to a corresponding data line in the data line bus; and

    whose drain is connected to the capacitive circuit of the second pixel; and

    which is capable of being switched on by activation on the associated scan line to allow a data voltage on the associated data line to be charged to the capacitive circuit of the second pixel; and

    a charge-neutralizing control switch, which has a gate, a source, and a drain; and

    whose gate is connected to a corresponding control line of the charge-neutralization control module;

    whose source is directly connected to the associated capacitive circuit of the first pixel in the adjacent pair of pixels; and

    whose drain is directly connected to the associated capacitive circuit of the second pixel in the adjacent pair of pixels; and

    which is capable of being switched on by activation on the associated control line to connect the capacitive circuit of the first pixel to the capacitive circuit of the second pixel for the purpose of neutralizing the current data voltage charges on the first pixel and the second pixel to substantially approach zero voltage level.

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