Hardware-centric medium access control (MAC) device
First Claim
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1. A hardware-centric medium access control (MAC) device comprising:
- a control plane module configured for providing control functions of said hardware-centric MAC device; and
a hardware media access plane module implemented as a portion of a system on a chip (SOC) and communicatively coupled to said control plane module and configured for performing real-time data and voice communication functions without requiring any microprocessor, said hardware media access plane module comprising;
a beacon process module operable to receive and to filter out unwanted voice traffic packets in hardware without use of other portions of said hardware-centric MAC device or using any microprocessor;
a de-fragmentation engine communicatively coupled with said beacon process module and configured for providing real-time de-fragmentation, in gate logic, of received voice traffic packets that are not filtered out by said beacon process module;
an encryption/decryption engine coupled with said de-fragmentation engine and operable to provide on-the-fly encryption/decryption of voice traffic packets with real-time logic based key retrieval merged with on-the-fly fragmentation and defragmentation; and
a fragmentation engine communicatively coupled with said encryption/decryption engine and configured for providing real-time fragmentation, in gate logic, of transmit voice traffic packets.
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Abstract
A hardware-centric medium access control (MAC) device comprises a control plane module and a hardware media access planed module. The control plane module is configured for providing control functions of the hardware-centric MAC device. The hardware media access plane module communicatively coupled to the control plane module is configured for performing real-time data communication functions without requiring a microprocessor.
20 Citations
8 Claims
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1. A hardware-centric medium access control (MAC) device comprising:
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a control plane module configured for providing control functions of said hardware-centric MAC device; and a hardware media access plane module implemented as a portion of a system on a chip (SOC) and communicatively coupled to said control plane module and configured for performing real-time data and voice communication functions without requiring any microprocessor, said hardware media access plane module comprising; a beacon process module operable to receive and to filter out unwanted voice traffic packets in hardware without use of other portions of said hardware-centric MAC device or using any microprocessor; a de-fragmentation engine communicatively coupled with said beacon process module and configured for providing real-time de-fragmentation, in gate logic, of received voice traffic packets that are not filtered out by said beacon process module; an encryption/decryption engine coupled with said de-fragmentation engine and operable to provide on-the-fly encryption/decryption of voice traffic packets with real-time logic based key retrieval merged with on-the-fly fragmentation and defragmentation; and a fragmentation engine communicatively coupled with said encryption/decryption engine and configured for providing real-time fragmentation, in gate logic, of transmit voice traffic packets. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification