Reading memory cells using multiple thresholds
First Claim
1. A method for operating a memory, comprising:
- storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing to the analog memory cells respective analog input values that program the analog memory cells to a set of memory states;
reading the stored data multiple times from each analog memory cell by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of adjacent ones of the analog value regions;
computing soft metrics responsively to the multiple comparison results; and
decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells.
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Accused Products
Abstract
A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
606 Citations
33 Claims
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1. A method for operating a memory, comprising:
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storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing to the analog memory cells respective analog input values that program the analog memory cells to a set of memory states; reading the stored data multiple times from each analog memory cell by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of adjacent ones of the analog value regions; computing soft metrics responsively to the multiple comparison results; and decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is connected to the interface and is coupled to store data, which is encoded with an Error Correction Code (ECC), in the analog memory cells by writing respective input analog values that program the analog memory cells to a set of memory states, to read the stored data multiple times from each analog memory cell by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of, to compute soft metrics responsively to the multiple comparison results, and to decode the ECC using the soft metrics, so as to extract the data stored in the analog memory cells. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A data storage apparatus, comprising:
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a memory device, comprising; a plurality of analog memory cells, which are configured to store data, which is encoded with an Error Correction Code (ECC) and written to the analog memory cells as respective analog input values that program the analog memory cells to a set of memory states; and reading circuitry, which is coupled to read the stored data multiple times from each analog memory cell by performing multiple read operations that compare output analog values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of adjacent ones of the analog value regions, to compute soft metrics responsively to the multiple comparison results, and to output the computed soft metrics; and a Memory Signal Processor (MSP) device, which is connected to the memory device and is coupled to accept the soft metrics computed by the reading circuitry, and to decode the ECC using the soft metrics.
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32. A method for operating a memory, comprising:
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storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells of the memory by writing to the analog memory cells in the group respective analog input values; reading the data from the analog memory cells in the group by comparing analog output values of the analog memory cells in the group to one or more read thresholds, and applying ECC decoding to the read data; and upon a failure of the ECC decoding, canceling interference caused to the analog memory cells in the group by at least one other analog memory cell, and re-decoding the ECC.
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33. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is connected to the interface and is coupled to store data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells of the memory by writing to the analog memory cells in the group respective analog input values, to read the data from the analog memory cells in the group by comparing analog output values of the analog memory cells in the group to one or more read thresholds, and applying ECC decoding to the read data, and, upon a failure of the ECC decoding, to cancel interference caused to the analog memory cells in the group by at least one other analog memory cell, and to re-decode the ECC.
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Specification