Dynamically controlling a prefetching range of a software controlled cache
First Claim
1. A method, in a data processing system, for dynamically controlling a prefetching range of a software controlled cache, the method comprising:
- receiving source code that is to be compiled;
analyzing the source code to identify at least one of a plurality of loops that contain irregular memory references;
for each irregular memory reference, determining whether if the irregular memory reference within the at least one of the plurality of loops is a candidate for optimization;
responsive to an indication that the irregular memory reference may be optimized, determining whether the irregular memory reference is valid for prefetching;
responsive to an indication that the irregular memory reference is valid for prefetching, inserting a store statement for an address of the irregular memory reference into the at least one of the plurality of loops; and
inserting a runtime library call into a prefetch runtime library to dynamically prefetch the irregular memory references associated with the at least one of the plurality of loops, wherein data associated with the irregular memory references are dynamically prefetched into the software controlled cache when the runtime library call is invoked and wherein the irregular memory references are dynamically prefetched for a lower boundary to an upper boundary of the at least one of the plurality of loops.
1 Assignment
0 Petitions
Accused Products
Abstract
Dynamically controlling a prefetching range of a software controlled cache is provided. A compiler analyzes source code to identify at least one of a plurality of loops that contain irregular memory references. For each irregular memory reference in the source code, the compiler determines whether the irregular memory reference is a candidate for optimization. Responsive to identifying an irregular memory reference that may be optimized, the complier determines whether the irregular memory reference is valid for prefetching. If the irregular memory reference is valid for prefetching, a store statement for an address of the irregular memory reference is inserted into the at least one loop. A runtime library call is inserted into a prefetch runtime library to dynamically prefetch the irregular memory references. Data associated with the irregular memory references are dynamically prefetched into the software controlled cache when the runtime library call is invoked.
-
Citations
20 Claims
-
1. A method, in a data processing system, for dynamically controlling a prefetching range of a software controlled cache, the method comprising:
-
receiving source code that is to be compiled; analyzing the source code to identify at least one of a plurality of loops that contain irregular memory references; for each irregular memory reference, determining whether if the irregular memory reference within the at least one of the plurality of loops is a candidate for optimization; responsive to an indication that the irregular memory reference may be optimized, determining whether the irregular memory reference is valid for prefetching; responsive to an indication that the irregular memory reference is valid for prefetching, inserting a store statement for an address of the irregular memory reference into the at least one of the plurality of loops; and inserting a runtime library call into a prefetch runtime library to dynamically prefetch the irregular memory references associated with the at least one of the plurality of loops, wherein data associated with the irregular memory references are dynamically prefetched into the software controlled cache when the runtime library call is invoked and wherein the irregular memory references are dynamically prefetched for a lower boundary to an upper boundary of the at least one of the plurality of loops. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A computer program product comprising a non-transitory computer readable medium storing a computer readable program recorded thereon, wherein the computer readable program, when executed on a computing device, causes the computing device to:
-
receive source code that is to be compiled; analyze the source code to identify at least one of a plurality of loops that contain irregular memory references; for each irregular memory reference, determine whether the irregular memory reference within the at least one of the plurality of loops is a candidate for optimization; responsive to an indication that the irregular memory reference may be optimized, determine whether the irregular memory reference is valid for prefetching; responsive to an indication that the irregular memory reference is valid for prefetching, insert a store statement for an address of the irregular memory reference into the at least one of the plurality of loops; and insert a runtime library call into a prefetch runtime library to dynamically prefetch the irregular memory references associated with the at least one of the plurality of loops, wherein data associated with the irregular memory references are dynamically prefetched into a software controlled cache when the runtime library call is invoked and wherein the irregular memory references are dynamically prefetched for a lower boundary to an upper boundary of the at least one of the plurality of loops. - View Dependent Claims (10, 11, 12, 13, 14)
-
-
15. An apparatus, comprising:
-
a processor; and a memory coupled to the processor, wherein the memory comprises instructions which, when executed by the processor, cause the processor to; receive source code that is to be compiled; analyze the source code to identify at least one of a plurality of loops that contain irregular memory references; for each irregular memory reference, determine whether the irregular memory reference within the at least one of the plurality of loops is a candidate for optimization; responsive to an indication that the irregular memory reference may be optimized, determine whether the irregular memory reference is valid for prefetching; responsive to an indication that the irregular memory reference is valid for prefetching, insert a store statement for an address of the irregular memory reference into the at least one of the plurality of loops; and insert a runtime library call into a prefetch runtime library to dynamically prefetch the irregular memory references associated with the at least one of the plurality of loops, wherein data associated with the irregular memory references are dynamically prefetched into a software controlled cache when the runtime library call is invoked and wherein the irregular memory references are dynamically prefetched for a lower boundary to an upper boundary of the at least one of the plurality of loops. - View Dependent Claims (16, 17, 18, 19, 20)
-
Specification