Copper bonding method

• US 8,148,256 B2
• Filed: 08/14/2009
• Issued: 04/03/2012
• Est. Priority Date: 05/31/2006
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Hébert, François, Bhalla, Anup
• Primary Examiner(s): CHU, CHRIS C
• Application Number:
  US12/541,881
• Publication Number:
  US 20100024213A1
• Time in Patent Office: 963 Days
• Field of Search: 257/E23.02, 257/778, 257780-782, 257/784, 257/786, 257/E23.037, 257/E23.015, 438/612, 438/614, 438/624, 438/108, 438/617, 438/666, 298/79
• US Class Current: 438/614
• CPC Class Codes: H01L 2224/02166 Collar structures
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05017 comprising protrusions or indentations
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05556 in side view
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/4807 of bonding interfaces, e.g. interlocking features
• CPC Class Codes: H01L 2224/48453 of the interface with the bonding area
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/48624 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48724 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48824 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/85201 Compression bonding
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: Y10T 29/49213 : Metal

Abstract

A copper bonding compatible bond pad structure and associated method is disclosed. The device bond pad structure includes a buffering structure formed of regions of interconnect metal and regions of non-conductive passivation material, the buffering structure providing buffering of underlying layers and structures of the device.

Claims

1. A method of forming a Cu bonding compatible bond pad structure comprising the steps of:

depositing passivation material upon said bond pad structure;

patterning said passivation material to provide a plurality of spaced-apart regions of said passivation material spaced-apart along a first direction, defining a plurality of hiatuses, portions of said bond pad structure in superimposition with said hiatuses being exposed and spaced-apart from a crown surface of said regions a second direction, extending transversely to said first direction, and wherein patterning further includes forming one of said plurality of spaced-apart regions with a zigzag shape.

2. The method of claim 1, wherein a buffering structure pattern comprises regions of interconnect metal and regions of dielectric passivation material.

3. The method of claim 2 further including determining the buffering structure pattern by optimizing an aspect ratio.

4. The method of claim 2, wherein the regions of interconnect metal are formed on an electrode interconnect metal layer underlying the dielectric passivation layer.

5. The method of claim 2, wherein the regions of dielectric passivation material comprise dots.

6. The method of claim 2, wherein the regions of dielectric passivation material comprise squares.

7. The method of claim 2, wherein the regions of dielectric passivation material comprise stripes.

8. The method as recited in claim 1 wherein depositing further includes depositing electrically non-conductive passivation material.

9. The method as recited in claim 1 wherein patterning further includes forming one of said plurality of spaced-apart regions with a circular shape.

10. The method as recited in claim 1 wherein patterning further includes forming one of said plurality of spaced-apart regions with a rectangular shape.

11. The method as recited in claim 1 wherein patterning further includes forming one of said plurality of spaced-apart regions with a square shape.

12. The method as recited in claim 1 wherein patterning further includes forming said plurality of spaced-apart regions to define a grid structure.

13. The method as recited in claim 1 wherein patterning further includes forming one of said plurality of spaced-apart regions with a chevron shape.

14. The method as recited in claim 1 wherein patterning further includes forming said plurality of spaced-apart regions with a wave shape.

15. The method of claim 1 further including providing a buffering structure with regions of interconnect metal formed on an electrode interconnect metal layer, with patterning further having the electrode interconnect metal layer underlying the passivation layer.

16. The method of claim 1 wherein patterning further including forming said regions to have a shape selected from a set of shapes consisting essentially of stripes, squares, circles, rectangles, chevrons, waves and zigzags.

17. The method of claim 1 wherein patterning further including forming one of said regions with a shape selected from a set of shapes consisting essentially of a stripe, a square, a circle, a rectangle, a chevron, a wave and a zigzag.