Self-aligned bipolar transistor structure

• US 8,148,799 B2
• Filed: 01/25/2010
• Issued: 04/03/2012
• Est. Priority Date: 12/01/2006
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: El-Diwany, Monir, Sadovnikov, Alexei, Ramdani, Jamal
• Primary Examiner(s): MENZ, LAURA MARY
• Application Number:
  US12/692,892
• Publication Number:
  US 20100127352A1
• Time in Patent Office: 799 Days
• Field of Search: 257/588, 257/586, 257/565
• US Class Current: 257/586
• CPC Class Codes: H01L 29/0817 of heterojunction bipolar transistors H01L29/7375 takes precedence
• CPC Class Codes: H01L 29/66242 Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: H01L 29/7378 comprising lattice mismatched active layers, e.g. SiGe strained layer transistors

Abstract

A bipolar transistor structure comprises a semiconductor substrate having a first conductivity type, a collector region having a second conductivity type that is opposite the first conductivity type formed in a substrate active device region defined by isolation dielectric material formed in an upper surface of the semiconductor substrate, a base region that includes an intrinsic base region having the first conductivity type formed over the collector region and an extrinsic base region having the second conductivity type formed over the isolation dielectric material, and a sloped in-situ doped emitter plug having the second conductivity type formed on the intrinsic base region.

Claims

1. A bipolar transistor structure formed in a semiconductor substrate having a first conductivity type, the bipolar transistor structure comprising:

a collector region having a second conductivity type that is opposite the first conductivity type and that is formed in a substrate active device region defined by isolation dielectric material formed in an upper surface of the semiconductor substrate;

an epitaxial layer having a monocrystalline portion formed over the collector region and a polycrystalline region formed over the isolation dielectric material;

a sloped in-situ doped emitter plug having the second conductivity type formed on the epitaxial layer, the sloped in-situ doped emitter having an upper surface area having a first width and a lower surface area having a second width that is less than the first width wherein the sidewalls of the sloped in-situ emitter plug are continuously sloped from the upper surface to the lower surface;

dielectric spacer material formed on sidewalls of the sloped in-situ doped emitter to provide an emitter structure such that the emitter structure may be utilized to introduce dopant having the first conductivity type into portions of the epitaxial layer.

2. The bipolar transistor structure of claim 1, and further comprising:

a base region that includes an intrinsic base region having the first conductivity type formed over the collector region and an extrinsic base region having the second conductivity type formed over dielectric isolation material.

3. The bipolar transistor structure of claim 2, wherein the in-situ doped emitter plug comprises a lower monocrystalline silicon portion formed on the intrinsic base region and an upper polycrystalline silicon portion formed on the lower monocrystalline silicon portion.

4. The bipolar transistor structure of claim 3, wherein the intrinsic base region and the extrinsic base region are formed from material selected from the group consisting of Si, SiGe, SiGe—

C and combinations thereof.

5. The bipolar transistor structure of claim 1, wherein the first width is about 180 nm or less and the second width is about 100-180 nm.