Class H amplifier

• US 8,149,061 B2
• Filed: 07/02/2010
• Issued: 04/03/2012
• Est. Priority Date: 07/06/2009
• Status: Active Grant

• Current Assignee: III Holdings 6, LLC (Intellectual Ventures LLC)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Schuurmans, Han Martijn
• Primary Examiner(s): NGUYEN, HIEU P
• Application Number:
  US12/829,532
• Publication Number:
  US 20110007909A1
• Time in Patent Office: 641 Days
• Field of Search: 330296-297, 330/10, 330/291, 330/207.A, 381/120
• US Class Current: 330/297
• CPC Class Codes: H03F 1/0238 using supply converters
• CPC Class Codes: H03F 3/2171 with field-effect devices H03F3/2173 - H03F3/2178 take precedence

Abstract

A class H amplifier circuit includes a Buck converter 20 and a charge pump 30 which are used to generate voltages which are used in turn to power an output driver 10. A feedback path 36 controls the loop. The circuit is particularly suitable as a high efficiency circuit for driving headphones or loudspeakers.

Claims

1. A class H amplifier circuit, comprising:

a voltage rail generating circuit comprising;

a control input;

a pulse width modulator connected to the control input;

a Buck converter connected to an output of the pulse width modulator for generating a voltage on a positive output node;

an inverting charge pump connected to the positive output node for generating a negative voltage on a negative output node, the negative voltage being the negative of the voltage on the positive output node;

a feedback path feeding back the voltage on the negative output node to sum with the signal on the control input to control the pulse width modulator, to provide a feedback loop including the Buck converter, inverting charge pump and pulse width modulator;

the class H amplifier circuit further comprising an output driver driven by a positive voltage rail connected to the positive output node and a negative voltage rail connected to the negative output node.

2. An amplifier circuit according to claim 1, wherein the Buck converter includes a plurality of PMOS switches and a plurality of NMOS switches, the Buck converter being arranged to use switches of greater total area to drive higher currents and switches of lesser total area to drive lower currents.

3. An amplifier circuit according to claim 1, further comprising a feedback device to invert and feed back the voltage on the positive output node to control the pulse width modulator.

4. An amplifier circuit according to claim 1, wherein an output of the output driver is connected to the control input to control the voltage rail generating circuit.

5. An amplifier circuit according to claim 1, further comprising a processor between the control input and an adder, the adder having one input connected to an output of the processor and an other input connected to the negative output node via the feedback loop.

6. An amplifier circuit according to claim 5 wherein the processor is arranged to rectify the signal on the circuit input and to generate an output signal having a voltage difference to the rectified signal, the voltage difference being substantially constant over a cycle of an input signal.

7. An amplifier circuit according to claim 5, wherein the adder is connected to the negative output node by a resistor and to the positive output node through an inverter and a capacitor.

8. An amplifier according to claim 1, wherein the charge pump is a controlled charge pump which monitors the voltage at the output of the charge pump and controls the charge pump to stabilise the voltage.

9. An amplifier according to claim 1, wherein the charge pump is an uncontrolled charge pump which does not monitor the voltage at the output of the charge pump.

10. An amplifier according to claim 1, further comprising a single voltage rail generating circuit and two output drivers, each being connected to the voltage rails output by the voltage rail generating circuit;

wherein the voltage rail generating circuit has two combining inputs, the control input of the voltage rail generating circuit receiving a signal that is based on a maximum absolute value of the voltage signal on the two combining inputs.

11. A headphone circuit comprising:

an amplifier according to claim 10; and

a pair of headphones, connected to the outputs of the two output drivers.

12. A headphone circuit comprising:

two class H amplifier circuits according to claim 1; and

a pair of headphones, connected to the outputs of the output drivers of the class H amplifier circuits.

13. A loudspeaker circuit comprising:

a class H amplifier circuit according to claim 9; and

a loudspeaker connected to the outputs of the output driver.