Methods to relax the second order intercept point of transceivers

• US 8,149,902 B1
• Filed: 09/13/2007
• Issued: 04/03/2012
• Est. Priority Date: 09/13/2007
• Status: Active Grant

• Current Assignee: Maxim Integrated Products, Inc. (Analog Devices, Inc.)
• Original Assignee: Maxim Integrated Products, Inc. (Analog Devices, Inc.)
• Inventors: Mohindra, Rishi
• Primary Examiner(s): Bocure, Tesfaldet
• Assistant Examiner(s): WILLIAMS, LAWRENCE B
• Application Number:
  US11/854,968
• Time in Patent Office: 1,664 Days
• Field of Search: 375/260, 375/316, 375/326, 375/340, 375/144, 375/148, 375219-233, 375/259, 375/267, 375295-296, 375/299, 375306-307, 375319-320, 375346-348, 370/277, 370/281, 370/295, 370/319, 370343-344, 370/478, 370480-481, 370/302, 370/330, 455/296, 455/310, 455/313, 455315-317, 455/323, 455/324, 455/69, 455/73, 455/78, 455 85- 87, 455/114.2, 329307-309, 329/306, 708/290
• US Class Current: 375/219
• CPC Class Codes: H04L 27/2657 Carrier synchronisation
• CPC Class Codes: H04L 27/2671 Time domain
• CPC Class Codes: H04L 27/364 Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits

Abstract

Methods to relax the second order intercept point of transceivers for multi-carrier and OFDM (such as IEEE 802.11a/g and 802.16) based zero IF wireless receivers that need to work in an environment with strong jamming signals, such as, for example, WLAN modules in Smart Phones. Due to the poor IP2 of WLAN (wireless local area network) receivers, unacceptable DC signals are produced in the I,Q quadrature paths when a strong out-of-band signal is received, e.g., from a co-located GSM phone. This completely destroys the received WLAN packet, resulting in an unacceptably high PER (packet error rate). In one aspect, the mixer reference for the receiver is effectively shifted (corrected) to accurately match the carrier of the received signal. In another aspect, the carrier is uncorrected for transmission. In still another aspect, a continuous DC correction is made on a per symbol basis. In still another aspect, the DC correction and the frequency correction are used together. Various embodiments are disclosed.

Claims

1. A method of relaxing the IP2 (2nd order intercept point) requirements for an 802.11a/g or a WiMAX wireless receiver of a transceiver having RF I and Q signal paths that need to work in an environment with strong jamming signals, the wireless receiver having a local oscillator having an uncorrected local oscillator frequency that differs from the carrier frequency of a received signal by a percentage of a subcarrier frequency spacing, comprising:

correcting the uncorrected local oscillator frequency of the wireless receiver by fractionally changing a synthesizer frequency and not adjusting a reference clock frequency so that the difference in the frequency of the carrier frequency of a received RF signal and the corrected local oscillator frequency of the wireless receiver to a down shifting mixer is at a difference frequency that is 3% or less than the subcarrier spacing;

determining and subtracting respective DC levels of each of the respective signals in the I and Q signal paths over a period of a fast Fourier transform time window for every symbol;

taking a fast Fourier transform of the signals in each of the I and Q signal paths over the fast Fourier transform time window after the respective DC level has been subtracted;

transmitting signals from the I and Q signal paths of the transceiver without changing the local oscillator frequency from the corrected local oscillator frequency, interpolating in the time domain the I(t) and Q(t) samples of the signals to be transmitted so that the correct I(t) and Q(t) are transmitted by the wireless transceiver.

2. The transceiver of claim 1, wherein a relative fractional frequency error between the receiver corrected local oscillator frequency and the reference clock frequency that is derived from a crystal oscillator that drives a sampling clock of analog to digital converter samplers of the I and Q signals, is compensated by interpolating the receiver I and Q sampled signals in the time domain in order to obtain the correct sampling values of the I and Q received signals.

3. The transceiver of claim 1, wherein a transmitter local oscillator frequency is the same as the receiver corrected local oscillator frequency in a time division duplexing system or at a fixed offset in a frequency division duplexing system, and a relative fractional frequency error between the transmitter local oscillator and the reference clock frequency that drives a clock of digital to analog converters of the transmit I and Q signals and is derived from a crystal oscillator, is compensated by interpolating the transmitted I and Q sampled signals in the digital domain prior to conversion to the analog domain.