Multichannel potentiostat having an adjustable counter-electrode potential

• US 8,152,977 B2
• Filed: 10/10/2008
• Issued: 04/10/2012
• Est. Priority Date: 11/02/2007
• Status: Active Grant

• Current Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Original Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Inventors: Bourgerette, Alain, Marchand, Gilles
• Primary Examiner(s): Bell, Bruce
• Application Number:
  US12/285,678
• Publication Number:
  US 20090114537A1
• Time in Patent Office: 1,278 Days
• Field of Search: 204/403.01, 204/403.02, 204/403.03, 204/406, 204/412
• US Class Current: 204/406
• CPC Class Codes: G01N 27/48 using polarography, i.e. measuring changes in current under a slowly-varying voltage

Abstract

The multichannel potentiostat comprises a reference terminal, a counter-electrode terminal, and at least two working terminals, respectively designed to be connected to a reference electrode, a counter-electrode and at least two working electrodes of an electrochemical cell. The potentiostat comprises first and second regulating circuits to apply a setpoint voltage respectively between the first and second working terminals and the reference terminal. The potentiostat comprises a control circuit of the counter-electrode voltage applied to the counter-electrode terminal. The control circuit comprises a first input terminal connected to a predefined potential and a second input terminal to which a regulating voltage representative of at least one of the voltages of the working terminals is applied.

Claims

1. A multichannel potentiostat comprising:

a reference terminal, a counter-electrode terminal and at least two working terminals respectively designed to be connected to a reference electrode, a counter-electrode and at least two working electrodes of an electrochemical cell,

a first regulating circuit having a first input electrically linked to the reference terminal and a second input electrically linked to a first working terminal, the first regulating circuit being configured to apply a first setpoint voltage between the reference terminal and the first working terminal,

a second regulating circuit having a first input electrically linked to the reference terminal and a second input electrically linked to the second working terminal, the second regulating circuit being configured to apply a second setpoint voltage between the reference terminal and the second working terminal,

a control circuit of the counter-electrode voltage applied to the counter-electrode terminal, wherein a first input terminal of the control circuit is linked to an output of the first regulating circuit and wherein a second input terminal of the control circuit is designed to be linked to a first device providing a first voltage on the second input, the control circuit being configured to apply a third setpoint voltage between the first voltage and the first setpoint voltage by modulating the counter-electrode voltage.

2. The potentiostat according to claim 1, wherein the first input terminal of the control circuit is linked to an output of the second regulating circuit.

3. The potentiostat according to claim 1, wherein the first input terminal of the control circuit is connected to a circuitry configured to provide an average of a voltage provided by the output of the first regulating circuit and a voltage provided by an output of the second regulating circuit.

4. The potentiostat according to claim 1, wherein the first input terminal of the control circuit is connected to the first working terminals.

5. The potentiostat according to claim 1, wherein the inputs electrically linked to the first and second working terminals of the regulating circuits are connected to inputs of a first and a second measuring operational amplifier, respectively, which have second inputs connected to the corresponding working terminal.

6. The potentiostat according to claim 5, wherein the counter-electrode voltage control circuit is formed by an operational amplifier having an inverting input forming the first input terminal of the control circuit and a non-inverting input forming a second input terminal of the control circuit.