Module having a stacked passive element and method of forming the same

• US 8,153,473 B2
• Filed: 10/02/2008
• Issued: 04/10/2012
• Est. Priority Date: 10/02/2008
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Empirion Incorporated
• Inventors: Lotfi, Ashraf W., Lopata, Douglas Dean, Weld, John David, Wilkowski, Mathew A.
• Primary Examiner(s): Garber, Charles
• Assistant Examiner(s): Pompey, Ron
• Application Number:
  US12/244,672
• Publication Number:
  US 20100087036A1
• Time in Patent Office: 1,286 Days
• Field of Search: 438/107, 438/111, 438/112, 438/118, 438/123, 438/124, 438/127, 257/E21.505, 257/E21.506, 257/E21.511, 257/E21.513, 257/E21.514, 336/65
• US Class Current: 438/107
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49113 the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 23/49589 Capacitor integral with or on the leadframe
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19103 : interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive

Abstract

A module having a discrete passive element and a semiconductor device, and method of forming the same. In one embodiment, the module includes a patterned leadframe, a discrete passive element mounted on an upper surface of the leadframe, and a thermally conductive, electrically insulating material formed on an upper surface of the discrete passive element. The module also includes a semiconductor device bonded to an upper surface of the thermally conductive, electrically insulating material.

Claims

1. A method of forming a module, comprising:

providing a patterned leadframe;

mounting a discrete passive element on an upper surface of said leadframe including a main body and metallic ends about ends of said main body extending laterally on an upper surface and a lower surface thereof, and an extended metallic region extending from one end of said metallic ends on said upper surface of said discrete passive element beyond said metallic end on said lower surface of said discrete passive element;

forming a thermally conductive, electrically insulating material on an upper surface of portions of said discrete passive element and said extended metallic region; and

bonding a semiconductor device including a higher heat producing region laterally-connected to a lower heat-producing region to an upper surface of said thermally conductive, electrically insulating material, wherein said higher heat-producing region is located above said extended metallic region.

2. The method as recited in claim 1 wherein said higher heat-producing region includes a switch.

3. The method as recited in claim 1 wherein said metallic ends include at least one base layer, an intermetallic barrier layer and a solderable surface.

4. The method as recited in claim 1 wherein said discrete passive element comprises another extended metallic region extending from another one of said metallic ends on said upper surface of said discrete passive element.

5. The method as recited in claim 1 wherein an active element of said semiconductor device is positioned at least partially over one of said metallic ends of said discrete passive element.

6. The method as recited in claim 1 wherein said mounting said discrete passive element comprises mounting said discrete passive element on a pad on said upper surface of said leadframe.

7. The method as recited in claim 1 further comprising disposing solder paste on a pad of said leadframe and said mounting said discrete passive element comprises mounting said discrete passive element via said solder paste on said pad on said upper surface of said leadframe.

8. The method as recited in claim 1 further comprising wire bonding said semiconductor device to a lead on said leadframe.

9. The method as recited in claim 1 further comprising coupling said semiconductor device to a lead on said leadframe and providing electrical connectivity via said lead to an external circuit.

10. The method as recited in claim 1 further comprising encapsulating said leadframe, said discrete passive element and said semiconductor device with an encapsulant.

11. A method of forming a power module, comprising:

providing a patterned leadframe;

mounting a discrete magnetic device on an upper surface of said leadframe including a main body and metallic ends about ends of said main body extending laterally on an upper surface and a lower surface thereof, and an extended metallic region extending from one end of said metallic ends on said upper surface of said discrete magnetic device beyond said metallic end on said lower surface of said discrete magnetic device;

forming a thermally conductive, electrically insulating material on an upper surface of portions of said discrete magnetic device and said extended metallic region; and

bonding a semiconductor device including a higher heat producing region laterally-connected to a lower heat-producing region to an upper surface of said thermally conductive, electrically insulating material, wherein said higher heat-producing region is located above said extended metallic region.

12. The method as recited in claim 11 wherein said higher heat-producing region includes a switch.

13. The method as recited in claim 11 wherein said metallic ends include at least one base layer, an intermetallic barrier layer and a solderable surface.

14. The method as recited in claim 11 wherein said discrete magnetic device comprises another extended metallic region extending from another one of said metallic ends on said upper surface of said discrete magnetic device.

15. The method as recited in claim 11 wherein an active element of said semiconductor device is positioned at least partially over one of said metallic ends of said discrete magnetic device.

16. The method as recited in claim 11 wherein said mounting said discrete magnetic device comprises mounting said discrete magnetic device on a pad on said upper surface of said leadframe.

17. The method as recited in claim 11 further comprising disposing solder paste on a pad of said leadframe and said mounting said discrete magnetic device comprises mounting said discrete magnetic device via said solder paste on said pad on said upper surface of said leadframe.

18. The method as recited in claim 11 further comprising wire bonding said semiconductor device to a lead on said leadframe.

19. The method as recited in claim 11 further comprising coupling said semiconductor device to a lead on said leadframe and providing electrical connectivity via said lead to an external circuit.

20. The method as recited in claim 11 further comprising encapsulating said leadframe, said discrete magnetic device and said semiconductor device with an encapsulant.