Pixel circuit for global electronic shutter
First Claim
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1. An image sensor comprising an array of pixels, each pixel comprising:
- a photodiode coupled between a first reference voltage and a first switch, said first switch operable to connect said photodiode to a first node;
a capacitor arranged to store a charge accumulated by said photodiode, said capacitor being coupled between a second reference voltage and a second node;
a second switch coupled between said first and second nodes, said second switch being operable to connect said capacitor to said first node; and
read circuitry connected to said first node for reading the voltage at said second node, the image sensor further comprising control circuitry arranged to control said first and second switches in each pixel to transfer a charge accumulated by said photodiode to said capacitor at the end of an integration period of said image sensor, and to control, in a row of pixels, the second switch to connect said capacitor to said first node when said row of pixels is to be read, wherein said photodiode is formed in a first P-type well and said second switch comprises a first transistor formed in a second P-type well, said first and second P-type wells having different doping levels, and wherein an N+ type region formed at a junction of said first and second P-type wells serves as said first node.
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Abstract
An image sensor formed of an array of pixels, each pixel including a photodiode coupled between a first reference voltage and a first switch, the first switch being operable to connect the photodiode to a first node; a capacitor arranged to store a charge accumulated by the photodiode, the capacitor being coupled between a second reference voltage and a second node; a second switch coupled between the first and second nodes, the second switch being operable to connect the capacitor to the first node; and read circuitry coupled for reading the voltage at the second node.
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Citations
19 Claims
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1. An image sensor comprising an array of pixels, each pixel comprising:
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a photodiode coupled between a first reference voltage and a first switch, said first switch operable to connect said photodiode to a first node; a capacitor arranged to store a charge accumulated by said photodiode, said capacitor being coupled between a second reference voltage and a second node; a second switch coupled between said first and second nodes, said second switch being operable to connect said capacitor to said first node; and read circuitry connected to said first node for reading the voltage at said second node, the image sensor further comprising control circuitry arranged to control said first and second switches in each pixel to transfer a charge accumulated by said photodiode to said capacitor at the end of an integration period of said image sensor, and to control, in a row of pixels, the second switch to connect said capacitor to said first node when said row of pixels is to be read, wherein said photodiode is formed in a first P-type well and said second switch comprises a first transistor formed in a second P-type well, said first and second P-type wells having different doping levels, and wherein an N+ type region formed at a junction of said first and second P-type wells serves as said first node. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of operating an image sensor comprising an array of pixels, each pixel comprising a photodiode, a first node connectable to said photodiode by a first transistor, and a capacitor connectable to said first node by a second transistor, said capacitor arranged to store a charge accumulated by said photodiode, the method comprising:
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accumulating charges by said photodiodes during an integration period; at the end of said integration period, controlling said first and second transistors to transfer said charges to said capacitors; and reading pixel voltages from a row of said pixels by reading the voltages stored by said capacitors in said row, wherein said photodiode is formed in a first P-type well and said second transistor is formed in a second P-type well, said first and second P-type wells having different doping levels, and wherein an N+ type region formed at a junction of said first and second P-type wells serves as said first node. - View Dependent Claims (8, 9, 10)
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11. An image sensor comprising an array of pixels, each pixel comprising:
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a photodiode coupled between a first reference voltage and a first transistor, the first transistor configured to connect the photodiode to a first node, the photodiode being formed in a first P-type well; a capacitor configured to store a charge accumulated by the photodiode, the capacitor being coupled between a second reference voltage and a second node; a second transistor coupled between the first and second nodes, the second transistor configured to connect the capacitor to the first node, the second transistor being formed in a second P-type well, wherein an N+ type region formed at a junction of the first and second P type wells serves as the first node; read circuitry coupled to the first node, the read circuitry configured to read a voltage at the second node; and control circuitry configured to control the first and second transistors to transfer a charge accumulated by the photodiode to the capacitor at an end of an integration period and to connect the capacitor to the first node when the pixel is to be read. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A method of manufacturing an image sensor comprising an array of pixels, each pixel including a photodiode, a node connected to the photodiode through a first transistor, and a second transistor connectable to a capacitor, comprising:
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forming the photodiode and the first transistor in a first P type well; forming the second transistor in a second P type well; and forming an N+ type region at a junction between the first and second P type wells, the N+ type region serving as the node. - View Dependent Claims (18, 19)
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Specification