Titanium aluminum oxide films

• US 8,154,066 B2
• Filed: 12/01/2006
• Issued: 04/10/2012
• Est. Priority Date: 08/31/2004
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): Quach, Tuan N.
• Application Number:
  US11/566,042
• Publication Number:
  US 20070090441A1
• Time in Patent Office: 1,957 Days
• Field of Search: 257/310, 257/315, 257/410, 257/532, 257/E29.255, 257/E29.3, 257/512
• US Class Current: 257/310
• CPC Class Codes: C23C 16/0281 of metallic sub-layers C23C16/029 takes precedence
• CPC Class Codes: C23C 16/40 Oxides
• CPC Class Codes: C23C 16/45531 specially adapted for making ternary or higher compositions
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02186 the material containing titanium, e.g. TiO2
• CPC Class Codes: H01L 21/02194 the material containing more than one metal element
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/28229 by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
• CPC Class Codes: H01L 21/3141 Deposition using atomic layer deposition techniques [ALD]
• CPC Class Codes: H01L 21/3142 of nano-laminates, e.g. alternating layers of Al203-Hf02
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence

Abstract

A dielectric layer containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric layer produce a reliable dielectric layer for use in a variety of electronic devices. Embodiments include a titanium aluminum oxide film structured as one or more monolayers. Embodiments also include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a titanium aluminum oxide film.

Claims

1. An electronic device comprising:

a substrate; and

a dielectric layer disposed in a circuit on the substrate, the dielectric layer containing a nanolaminate having more than two different materials in layers of a layered stack, where the layers are alternating layers of the more than two different materials, the nanolaminate including a first titanium aluminum oxide film, the first titanium aluminum oxide being a bimetal oxide compound consisting essentially of titanium, aluminum, and oxide and structured as a layered arrangement of one or more monolayers such that the first titanium aluminum oxide film is titanium rich, the nanolaminate including a second titanium aluminum oxide film consisting essentially of titanium, aluminum, and oxide, the second titanium aluminum oxide having a stoichiometry different from being titanium rich.

2. The electronic device of claim 1, wherein the electronic device includes an interface between and contacting the dielectric layer and the substrate, the interface having a silicon oxide layer having at most two monolayers of thickness.

3. The electronic device of claim 1, wherein an interface between the dielectric layer and the substrate is substantially without a silicon oxide layer.

4. The electronic device of claim 1, wherein the dielectric layer is essentially the nanolaminate and the second titanium aluminum oxide is aluminum rich.

5. The electronic device of claim 1, wherein the electronic device includes an insulating interface between the dielectric layer and the substrate, the insulating interface having titanium atoms, aluminum atoms, or a combination of titanium and aluminum atoms.

6. An electronic device comprising:

a substrate; and

a dielectric layer disposed in a transistor in a circuit on the substrate, the dielectric layer arranged as an insulator contacting a gate of the transistor, the dielectric layer containing a nanolaminate having more than two different materials in layers of a layered stack, where the layers are alternating layers of the more than two different materials, the nanolaminate including a first titanium aluminum oxide film, the first titanium aluminum oxide being a bimetal oxide compound consisting essentially of titanium, aluminum, and oxide and structured as a layered arrangement of one or more monolayers such that the first titanium aluminum oxide film is titanium rich, the nanolaminate including a second titanium aluminum oxide film consisting essentially of titanium, aluminum, and oxide, the second titanium aluminum oxide having a stoichiometry different from being titanium rich.

7. The electronic device of claim 6, wherein the dielectric layer is arranged as a gate insulator in a complementary metal oxide semiconductor device.

8. The electronic device of claim 6, wherein the transistor includes a floating gate transistor having the dielectric layer arranged as a floating gate insulator of the transistor.

9. The electronic device of claim 6, wherein the nanolaminate includes an insulating metal oxide layer in addition to including the first and second titanium aluminum oxide films.

10. An electronic device comprising:

a substrate; and

a dielectric layer disposed as a capacitor dielectric in a capacitor in a circuit on the substrate, the dielectric layer containing a nanolaminate having more than two different materials in layers of a layered stack, where the layers are alternating layers of the more than two different materials, the nanolaminate including a first titanium aluminum oxide film, the first titanium aluminum oxide being a bimetal oxide compound consisting essentially of titanium, aluminum, and oxide and structured as a layered arrangement of one or more monolayers such that the first titanium aluminum oxide film is titanium rich, the nanolaminate including a second titanium aluminum oxide film consisting essentially of titanium, aluminum, and oxide, the second titanium aluminum oxide having a stoichiometry different from being titanium rich.

11. The electronic device of claim 10, wherein the electronic device includes an analog integrated circuit in which the capacitor is disposed.

12. The electronic device of claim 10, wherein the electronic device includes a radio frequency integrated circuit in which the capacitor is disposed.

13. The electronic device of claim 10, wherein the electronic device includes a mixed signal integrated circuit in which the capacitor is disposed.

14. A memory comprising:

a memory array on a substrate, the memory array including a dielectric layer containing a nanolaminate having more than two different materials in layers of a layered stack, where the layers are alternating layers of the more than two different materials, the nanolaminate including a first titanium aluminum oxide film, the first titanium aluminum oxide being a bimetal oxide compound consisting essentially of titanium, aluminum, and oxide and structured as a layered arrangement of one or more monolayers such that the first titanium aluminum oxide film is titanium rich, the nanolaminate including a second titanium aluminum oxide film consisting essentially of titanium, aluminum, and oxide, the second titanium aluminum oxide having a stoichiometry different from being titanium rich; and

conductive lines to access the array.

15. The memory of claim 14, wherein the memory includes an interface between and contacting the dielectric layer and the substrate, the interface having a silicon oxide layer having at most two monolayers of thickness.

16. The memory of claim 14, wherein the memory includes an interface between and contacting the dielectric layer and the substrate, the interface structured substantially without a silicon oxide layer.

17. The memory of claim 14, wherein the memory is a flash memory device having the dielectric layer disposed an inter-gate insulator between and contacting a floating gate and a control gate of a transistor in the memory array of the flash memory device.

18. The memory of claim 14, wherein the dielectric layer is a gate insulator between and contacting a floating gate and a channel of a transistor in the memory array.

19. The memory of claim 14, wherein the dielectric layer is a dielectric of a capacitor in the memory array.

20. The memory of claim 14, wherein the dielectric layer is structured substantially as the nanolaminate in the memory array.

21. A system comprising:

a controller; and

an integrated circuit coupled to the controller, wherein the integrated circuit includes a dielectric layer disposed on a substrate, the dielectric layer containing a nanolaminate having more than two different materials in layers of a layered stack, where the layers are alternating layers of the more than two different materials, the nanolaminate including a first titanium aluminum oxide film, the first titanium aluminum oxide being a bimetal oxide compound consisting essentially of titanium, aluminum, and oxide and structured as a layered arrangement of one or more monolayers such that the first titanium aluminum oxide film is titanium rich, the nanolaminate including a second titanium aluminum oxide film consisting essentially of titanium, aluminum, and oxide, the second titanium aluminum oxide having a stoichiometry different from being titanium rich.

22. The system of claim 21, wherein the integrated circuit includes an interface between the dielectric layer and the substrate, the interface including a silicon oxide layer at most two monolayers thick.

23. The system of claim 21, wherein the integrated circuit includes an interface between the dielectric layer and the substrate, the interface being substantially without a silicon oxide interface layer.

24. The system of claim 21, wherein the integrated circuit includes a memory.

25. The system of claim 21, wherein the controller includes a processor.