Semiconductor device

• US 8,154,103 B2
• Filed: 12/17/2010
• Issued: 04/10/2012
• Est. Priority Date: 06/03/2008
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Tohiba
• Inventors: Tanaka, Hiroyasu, Aochi, Hideaki, Katsumata, Ryota, Kidoh, Masaru, Fukuzumi, Yoshiaki, Kito, Masaru, Matsuoka, Yasuyuki
• Primary Examiner(s): Lee, Calvin
• Application Number:
  US12/972,243
• Publication Number:
  US 20110084331A1
• Time in Patent Office: 480 Days
• Field of Search: 438/221, 438/319, 438/411, 438/619, 257520-522, 257/E23.013, 257/E21.573
• US Class Current: 257/522
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H01L 29/7923 Programmable transistors with more than two possible different levels of programmation
• CPC Class Codes: H01L 29/7926 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
• CPC Class Codes: H10B 43/20 characterised by three-dimensional arrangements, e.g. with cells on different height levels
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels

Abstract

A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.

Claims

1. A semiconductor device comprising:

a plurality of first insulating films and gate electrodes alternately laminated above a semiconductor substrate;

a body section penetrating through the plurality of first insulating films and gate electrodes, and containing an insulating region; and

a second insulating film surrounding the body section, having a charge accumulating ability formed between the body section and the gate electrode.

2. The semiconductor device according to claim 1, wherein the insulating region is a void.

3. The semiconductor device according to claim 1, wherein the insulating region is an insulating film.

4. The semiconductor device according to claim 3, wherein the insulating film is a silicon oxide film or a silicon nitride film.

5. The semiconductor device according to claim 1, wherein a diameter of the body section on the first insulating film is larger than the diameter on of the body section on the gate electrode.

6. The semiconductor device according to claim 1, wherein a diameter of the body section on the gate electrode is larger than a diameter of the body section on the first insulating film.