Data processing method and device
First Claim
1. A data processing arrangement, comprising:
- at least one standard processor adapted for processing data in a sequential manner, the at least one standard processor including an instruction pipeline;
a reconfigurable array including a plurality of data processing cells coupled to the at least one standard processor via the instruction pipeline;
a plurality of IRAM memory elements coupled to the reconfigurable array, at least some of the IRAM memory elements forming a data cache for storing local cache copies of a main memory; and
a preloadable configuration cache for storing configuration data, wherein at least some of the data processing cells of the reconfigurable array are coupled to the configuration cache, thereby supporting at least one of preloading of a configuration and a fast configuration switch.
4 Assignments
0 Petitions
Accused Products
Abstract
In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements, the first result data may be subsequently read out from the memory, and the first result data may be subsequently processed using the plurality of configurable coarse-granular elements. In a first configuration, the first memory area may be configured as a write memory, and the second memory area may be configured as a read memory. Subsequent to writing to and reading from the memory in accordance with the first configuration, the first memory area may be configured as a read memory, and the second memory area may be configured as a write memory.
-
Citations
37 Claims
-
1. A data processing arrangement, comprising:
-
at least one standard processor adapted for processing data in a sequential manner, the at least one standard processor including an instruction pipeline; a reconfigurable array including a plurality of data processing cells coupled to the at least one standard processor via the instruction pipeline; a plurality of IRAM memory elements coupled to the reconfigurable array, at least some of the IRAM memory elements forming a data cache for storing local cache copies of a main memory; and a preloadable configuration cache for storing configuration data, wherein at least some of the data processing cells of the reconfigurable array are coupled to the configuration cache, thereby supporting at least one of preloading of a configuration and a fast configuration switch. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
-
-
17. A data processing method, comprising:
-
providing a reconfigurable array of data processing cells for data processing; providing at least one standard processor for processing data in a sequential manner, the at least one standard processor including an instruction pipeline via which the reconfigurable array is coupled to the at least one standard processor; providing a preloadable configuration cache for storing configuration data; coupling the reconfigurable array to a cache for data processing, the cache containing local cache copies of a main memory, including a plurality of IRAM memory elements, and being explicitly software managed; and coupling at least some of the data processing cells of the reconfigurable array to the configuration cache, thereby supporting at least one of preloading a configuration and a fast configuration switch. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37)
-
Specification