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Voltage-based memory size scaling in a data processing system

DC CAFC
  • US 8,156,357 B2
  • Filed: 01/27/2009
  • Issued: 04/10/2012
  • Est. Priority Date: 01/27/2009
  • Status: Active Grant
First Claim
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1. A method of using a cache having a plurality of ways, comprising:

  • accessing the cache with a power supply voltage applied to the cache at a first value;

    reducing the power supply voltage to a second value;

    identifying a first set of ways of the plurality of ways as being non-functional, wherein the being non-functional is caused by the power supply voltage being at the second value, wherein the first set of ways is less than all ways of the cache, and the step of identifying the first set of ways comprises;

    retrieving information that correlates non-functional ways of the cache with values of the power supply voltage;

    accessing the cache exclusive of the first set of ways, wherein the step of accessing the cache exclusive of the first set of ways is performed with the power supply voltage at the second value;

    increasing the power supply voltage to a third value;

    identifying a second set of ways of the first set of ways that is functional with the power supply being applied at the third value; and

    accessing the cache including the second set of ways.

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