Thin-film transistor and method of manufacturing the same

• US 8,158,976 B2
• Filed: 02/26/2010
• Issued: 04/17/2012
• Est. Priority Date: 07/24/2009
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Son, Kyoung-seok, Kwon, Jang-yeon, Kim, Hyoung-sub, Lee, Hoo-jeong, Moon, Mi-ran, Park, Kyung
• Primary Examiner(s): Nguyen, Cuong Q
• Assistant Examiner(s): TRAN, TRANG Q
• Application Number:
  US12/659,153
• Publication Number:
  US 20110017990A1
• Time in Patent Office: 781 Days
• Field of Search: 257/43, 257/E29.296, 257/E29.068
• US Class Current: 257/43
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Example embodiments relate to thin-film transistors (TFT) and methods for fabricating the same. A thin-film transistor according to example embodiments may include a gate, a gate insulation layer, a channel layer including a first oxide semiconductor layer and a second oxide semiconductor layer, and a source and drain on opposite sides of the channel layer. The first oxide semiconductor layer may have relatively large crystal grains compared to the second oxide semiconductor layer.

Claims

1. A thin-film transistor comprising:

a gate;

a gate insulation layer;

a channel layer including a first oxide semiconductor layer and a second oxide semiconductor layer; and

a source and drain on opposite sides of the channel layer,

wherein the first oxide semiconductor layer has larger crystal grains than the second oxide semiconductor layer.

2. The thin-film transistor of claim 1, wherein the first oxide semiconductor layer is closer to the gate than the second oxide semiconductor layer.

3. The thin-film transistor of claim 2, wherein the thin-film transistor has a bottom gate structure.

4. The thin-film transistor of claim 2, wherein the thin-film transistor has a top gate structure.

5. The thin-film transistor of claim 4, wherein the source and drain are self-aligned with the gate.

6. The thin-film transistor of claim 1, wherein a thickness of the second oxide semiconductor layer is greater than that of the first oxide semiconductor layer.

7. The thin-film transistor of claim 6, wherein

the thickness of the first oxide semiconductor layer is from about 10 nm to about 200 nm, and

the thickness of the second oxide semiconductor layer is from about 15 nm to about 300 nm.

8. The thin-film transistor of claim 1, wherein crystal grain sizes of the first and second oxide semiconductor layers are controlled by deposition power.

9. The thin-film transistor of claim 8, wherein each of the first and second oxide semiconductor layers are formed of at least one material selected from the group consisting of ZnO, In₂O₃, Ga₂O₃, SnO, IZO, ITO, GIZO, and HflnZnO.

10. The thin-film transistor of claim 1, wherein the first and second oxide semiconductor layers are formed of crystalline ZnO.

11. A method of fabricating a thin-film transistor, comprising:

forming a gate;

forming a first oxide semiconductor layer of a crystalline material;

forming a second oxide semiconductor layer having smaller crystal grains than the first oxide semiconductor layer, the first and second oxide semiconductor layers constituting a channel layer; and

forming a source and drain on opposite sides of the channel layer.

12. The method of claim 11, wherein the channel layer is formed such that the first oxide semiconductor layer is disposed closer to the gate than the second oxide semiconductor layer.

13. The method of claim 12, wherein a deposition power for forming the first oxide semiconductor layer and a deposition power for forming the second oxide semiconductor layer are different.

14. The method of claim 13, wherein the deposition power for forming the second oxide semiconductor layer is greater than the deposition power for forming the first oxide semiconductor layer.

15. The method of claim 11, wherein

a thickness of the first oxide semiconductor layer is from about 10 nm to about 200 nm, and

a thickness of the second oxide semiconductor layer is from about 15 nm to about 300 nm.

16. The method of claim 11, wherein each of the first and second oxide semiconductor layers are formed of at least one material selected from the group consisting of ZnO, In₂O₃, Ga₂O₃, SnO, IZO, ITO, GIZO, and HfInZnO.

17. The method of claim 11, wherein the first and second oxide semiconductor layers are formed of crystalline ZnO.