Nested transimpendance amplifier

• US 8,159,293 B2
• Filed: 08/17/2010
• Issued: 04/17/2012
• Est. Priority Date: 03/13/2001
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Sutardja, Sehat
• Primary Examiner(s): Nguyen, Patricia
• Application Number:
  US12/857,949
• Publication Number:
  US 20110018627A1
• Time in Patent Office: 609 Days
• Field of Search: 330/99, 330/297, 330/107, 330/98
• US Class Current: 330/98
• CPC Class Codes: H03F 1/08 Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements wide-band amplifiers with inter-stage coupling networks incorporating these impedances H03F1/42
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 2200/331 Sigma delta modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2200/36 the amplifier comprising means for increasing the bandwidth
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45531 the FBC comprising a parallel resonance circuit and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45652 the LC comprising one or more further dif amp stages, either identical to the dif amp or not, in cascade
• CPC Class Codes: H03F 3/08 controlled by light
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/45928 using IC blocks as the active amplifying circuit

Abstract

A nested transimpedance amplifier circuit including a first power source, a second power source, a charge pump module and a transimpedance amplifier. The first power source is at a first voltage. The second power source is at a second voltage. The second voltage is different than the first voltage. The charge pump module (i) receives the first voltage and the second voltage and (ii) generates a third voltage based on the first voltage and the second voltage. The first transimpedance amplifier includes an input, an output and a first operational amplifier. The input of the first transimpedance amplifier receives an input voltage. The output of the first transimpedance amplifier outputs an output voltage. The first operational amplifier receives the third voltage. The first transimpedance amplifier generates the output voltage based on the third voltage and the input voltage.

Claims

1. A nested transimpedance amplifier circuit, comprising:

a first power source at a first voltage;

a second power source at a second voltage, wherein the second voltage is different than the first voltage;

a charge pump module configured to

receive the first voltage and the second voltage, and

generate a third voltage based on the first voltage and the second voltage; and

a first transimpedance amplifier comprising (i) an input configured to receive an input voltage, (ii) an output configured to output an output voltage and (iii) a first operational amplifier configured to receive the third voltage, wherein the first transimpedance amplifier is configured to generate the output voltage based on the third voltage and the input voltage.

2. The nested transimpedance amplifier circuit of claim 1, wherein the first transimpedance amplifier comprises a second transimpedance amplifier comprising the input and an output, wherein the output of the second transimpedance amplifier is connected to an input of the first operational amplifier.

3. The nested transimpedance amplifier circuit of claim 2, wherein the second transimpedance amplifier comprises:

a second operational amplifier comprising (i) an input and (ii) the output of the second transimpedance amplifier; and

a third operational amplifier comprising the input of the first transimpedance amplifier and an output, wherein the output of the third operational amplifier is connected to the input of the second operational amplifier.

4. The nested transimpedance amplifier circuit of claim 3, wherein the second transimpedance amplifier comprises a first resistance connected to (i) the input of the second operational amplifier and (ii) the output of the second operational amplifier.

5. The nested transimpedance amplifier circuit of claim 4, further comprising:

a first capacitance connected to the input of the first transimpedance amplifier;

a second capacitance having (i) an input connected to the input of the first transimpedance amplifier and (ii) an output;

a second resistance connected between the output of the second capacitance and the output of the first transimpedance amplifier; and

a third resistance connected between the output of the second transimpedance amplifier and the output of the first transimpedance amplifier.

6. The nested transimpedance amplifier circuit of claim 4, wherein the first transimpedance amplifier comprises a capacitance connected between the input of the first transimpedance amplifier and a ground reference.

7. The nested transimpedance amplifier circuit of claim 6, further comprising a second resistance connected to (i) the input of the first transimpedance amplifier and (ii) the output of the first transimpedance amplifier.

8. The nested transimpedance amplifier circuit of claim 7, wherein the first operational amplifier comprises:

a first transistor comprising (i) a first input configured to receive the third voltage, (ii) the output of the first transimpedance amplifier, and (iii) a second input connected to the output of the second transimpedance amplifier; and

a second transistor comprising (i) a first input connected to the output of the first transimpedance amplifier, (ii) a output connected to a first current source, and (iii) a second input configured to receive a bias voltage.

9. The nested transimpedance amplifier circuit of claim 8, further comprising a second current source connected to the first input of the first transistor.

10. The nested transimpedance amplifier circuit of claim 7, further comprising:

a fourth operational amplifier comprising (i) an input connected to the output of the first transimpedance amplifier and (ii) an output;

a third resistance having (i) an input and (ii) an output connected to the output of the fourth operational amplifier; and

a fifth operational amplifier comprising (i) an input connected to the input of the third resistance and (ii) an output connected to the input of the first transimpedance amplifier.

11. The nested transimpedance amplifier circuit of claim 10, further comprising:

a second capacitance connected between (i) the input of the first transimpedance amplifier and (ii) the output of the second operational amplifier; and

a third capacitance connected between (i) the input of the fifth operational amplifier and (ii) the output of the first transimpedance amplifier.

12. The nested transimpedance amplifier circuit of claim 10, further comprising a third resistance connected between (i) the output of the first transimpedance amplifier and (ii) the output of the fourth operational amplifier.

13. The nested transimpedance amplifier circuit of claim 7, further comprising a second capacitance connected between (i) the input of the first transimpedance amplifier and (ii) the output of the second operational amplifier.

14. The nested transimpedance amplifier circuit of claim 13, further comprising a third resistance connected between (i) the output of the second transimpedance amplifier and (ii) the output of the first transimpedance amplifier.

15. The nested transimpedance amplifier circuit of claim 7, further comprising a third resistance connected between (i) the output of the second transimpedance amplifier and (ii) the output of the first transimpedance amplifier.

16. The nested transimpedance amplifier circuit of claim 1, wherein the input voltage is different than the first voltage and the second voltage.

17. The nested transimpedance amplifier circuit of claim 1, further comprising a voltage regulator configured to regulate the second voltage.

18. The nested transimpedance amplifier circuit of claim 1, wherein the charge pump module sums the first voltage and the second voltage to generate the third voltage.

19. The nested transimpedance amplifier circuit of claim 1, wherein the first voltage is greater than the second voltage.

20. The nested transimpedance amplifier circuit of claim 19, wherein:

the first voltage is applied to analog circuitry; and

the second voltage is applied to digital circuitry.

21. The nested transimpedance amplifier circuit of claim 1, further comprising a light-emitting diode connected to the output,

wherein the charge pump module generates the third voltage by adding the first voltage to the second voltage to drive the light-emitting diode.