Subsystems and methods for use in patch clamp systems

• US 8,163,527 B2
• Filed: 05/02/2008
• Issued: 04/24/2012
• Est. Priority Date: 05/04/2007
• Status: Active Grant

• Current Assignee: Tecella LLC
• Original Assignee: Tecella LLC
• Inventors: Tanaka, Yokichi J.
• Primary Examiner(s): Ball, J. Christopher
• Application Number:
  US12/114,474
• Publication Number:
  US 20080296175A1
• Time in Patent Office: 1,453 Days
• Field of Search: 4351734-1737, 20440301-40302, 205/792, 205/777.5, 324/692, 324/76.12, 324/720, 327/362, 327378-388, 327551-559, 327/590
• US Class Current: 435/173.4
• CPC Class Codes: G01N 33/48728 Investigating individual cells, e.g. by patch clamp, voltage clamp investigating individual particles in general G01N15/10

Abstract

Subsystems and methods for use in patch clamp systems are provided. For example, in certain embodiments, compensation circuitry is used to compensate for non-idealities present in the patch clamp system. The accuracy of this compensation may be verified by employing, for example, circuitry that models the patch clamp system.

Claims

1. A method for compensating a patch clamp system used in electrophysiological experiments, the method comprising:

calibrating, with at least one first calibration value, compensation circuitry to compensate for non-idealities introduced by analog model circuitry that models at least a portion of the patch clamp system;

measuring a characteristic of at least one cell while employing the compensation circuitry, re-calibrated with at least one second calibration value, to compensate for non-idealities introduced by the patch clamp system; and

following the measuring of the characteristic, verifying that the compensation circuitry, further re-calibrated with the at least one first calibration value, compensates for non-idealities introduced by the model circuitry.

2. The method of claim 1, wherein the compensation circuitry is calibrated, with the at least one first calibration value, to compensate for stray capacitances introduced by the model circuitry.

3. The method of claim 2, wherein the compensation circuitry is calibrated, with the at least one first calibration value, to compensate for a stray capacitance introduced by model circuitry of a long cable.

4. The method of claim 2, wherein the compensation circuitry is calibrated, with the at least one first calibration value, to compensate for a stray capacitance introduced by model circuitry of a long cable in series with a single cell.

5. The method of claim 2, wherein the compensation circuitry is calibrated, with the at least one first calibration value, to compensate for a stray capacitance introduced by model circuitry of a long cable in series with multiple cells.

6. The method of claim 1 further comprising activating the model circuitry prior to calibrating the compensation circuitry with the at least one first calibration value.

7. The method of claim 6 further comprising de-activating the model circuitry prior to measuring the characteristic of the at least one cell.

8. The method of claim 7 further comprising re-activating the model circuitry following the measuring of the characteristic of the at least one cell.

9. The method of claim 1, wherein the compensation circuitry is re-calibrated, with the at least one second calibration value and prior to measuring the characteristic of the at least one cell, to compensate for stray capacitances introduced by the patch clamp system.

10. The method of claim 9, wherein the compensation circuitry is re-calibrated, with the at least one second calibration value, to compensate for a stray capacitance introduced by a long cable in the patch clamp system.

11. The method of claim 9, wherein the compensation circuitry is re-calibrated, with the at least one second calibration value, to compensate for a stray capacitance introduced by a long cable in series with a single cell in the patch clamp system.

12. The method of claim 9, wherein the compensation circuitry is re-calibrated, with the at least one second calibration value, to compensate for a stray capacitance introduced by a long cable in series with multiple cells in the patch clamp system.

13. The method of claim 1, wherein the compensation circuitry is re-calibrated, with the at least one second calibration value and prior to measuring the characteristic of the at least one cell, to compensate for leakage resistance introduced by the patch clamp system.

14. The method of claim 1 further comprising measuring a stray capacitance introduced by at least one component in the patch clamp system.

15. The method of claim 14, wherein the at least one component comprises a long cable.

16. The method of claim 14, wherein the at least one component comprises a long cable in series with a single cell.

17. The method of claim 14, wherein the at least one component comprises a long cable in series with multiple cells.

18. The method of claim 14 further comprising comparing the measured stray capacitance to a capacitance modeled by the model circuitry to verify compensation for the non-idealities introduced by the patch clamp system.

19. The method of claim 18 further comprising discontinuing the measuring of the characteristic of the at least one cell if the measured stray capacitance differs from the capacitance modeled by the model circuitry by more than a predetermined amount.

20. The method of claim 1 further comprising comparing the first and second calibration values to verify compensation for the non-idealities introduced by the patch clamp system.

21. The method of claim 1, wherein the measured characteristic of the at least one cell is current.

22. The method of claim 1 further comprising increasing the gain of an amplifier employed in measuring the characteristic of the at least one cell after the compensation circuitry is re-calibrated with the at least one second calibration value.

23. A subsystem that compensates a patch clamp system used in electrophysiological experiments, the subsystem comprising:

analog model circuitry that models at least a portion of the patch clamp system;

compensation circuitry that compensates for non-idealities, the compensation circuitry compensating for non-idealities introduced by the model circuitry when calibrated with at least one first calibration value and compensating for non-idealities introduced by the patch clamp system when calibrated with at least one second calibration value;

measurement circuitry that measures a characteristic of at least one cell while receiving input from the compensation circuitry to compensate for the non-idealities introduced by the patch clamp system; and

a verification module that verifies, following the measurement of the characteristic, that the compensation circuitry, re-calibrated with the at least one first calibration value, compensates for the non-idealities introduced by the model circuitry.

24. The subsystem of claim 23, wherein the compensation circuitry is calibrated to compensate for stray capacitances introduced by the model circuitry.

25. The subsystem of claim 24, wherein the compensation circuitry is calibrated to compensate for a stray capacitance introduced by model circuitry of a long cable.

26. The subsystem of claim 24, wherein the compensation circuitry is calibrated to compensate for a stray capacitance introduced by model circuitry of a long cable in series with a single cell.

27. The subsystem of claim 24, wherein the compensation circuitry is calibrated to compensate for a stray capacitance introduced by model circuitry of a long cable in series with multiple cells.

28. The subsystem of claim 23, wherein the model circuitry activates prior to the compensation circuitry being calibrated with the at least one first calibration value.

29. The subsystem of claim 28, wherein the model circuitry de-activates prior to measuring the characteristic of the at least one cell with the measurement circuitry.

30. The subsystem of claim 29, wherein the model circuitry re-activates following the measuring of the characteristic of the at least one cell with the measurement circuitry.

31. The subsystem of claim 23, wherein the compensation circuitry is calibrated to compensate for stray capacitances introduced by the patch clamp system.

32. The subsystem of claim 31, wherein the compensation circuitry is calibrated to compensate for a stray capacitance introduced by a long cable in the patch clamp system.

33. The subsystem of claim 31, wherein the compensation circuitry is calibrated to compensate for a stray capacitance introduced by a long cable in series with a single cell in the patch clamp system.

34. The subsystem of claim 31, wherein the compensation circuitry is calibrated to compensate for a stray capacitance introduced by a long cable in series with multiple cells in the patch clamp system.

35. The subsystem of claim 23, wherein the compensation circuitry is calibrated to compensate for leakage resistance introduced by the patch clamp system.

36. The subsystem of claim 23, wherein the verification module compares a stray capacitance value measured from the patch clamp system to a capacitance value modeled by the model circuitry to verify compensation for the non-idealities introduced by the patch clamp system.

37. The subsystem of claim 36, wherein the measurement circuitry discontinues measuring the characteristic of the at least one cell if the measured stray capacitance value differs from the capacitance value modeled by the model circuitry by more than a predetermined amount.

38. The subsystem of claim 23, wherein the verification module compares the first and second calibration values to verify compensation for the non-idealities introduced by the patch clamp system.

39. The subsystem of claim 23, wherein the measured characteristic of the at least one cell is current.

40. The subsystem of claim 23, wherein the measurement circuitry comprises an amplifier having a gain, the gain being increased after the compensation circuitry is calibrated with the at least one second calibration value.

41. The subsystem of claim 23, wherein the subsystem is used with a patch clamp system comprising a test head, a main amplifier, and a long cable therebetween, and wherein the model circuitry, the compensation circuitry, and the measurement circuitry are all located within the main amplifier.

42. The subsystem of claim 41, further comprising ultra-low capacitance switches within the main amplifier.

43. A system for compensating a series resistance of a device used in measuring a characteristic of at least one cell in an electrophysiological experiment, the system comprising:

clamping circuitry configured to i) apply a stimulus to the cell through the device and ii) measure the characteristic of the cell; and

an operational amplifier having an output coupled to an input of the clamping circuitry, wherein an input to an inverting terminal of the operational amplifier is substantially equal to the output of the operational amplifier less a signal proportional to the measured characteristic of the cell.

44. The system of claim 43, wherein the device comprises an electrode.

45. The system of claim 43, wherein the measured characteristic comprises current.