Pixel structure and fabricating method thereof
First Claim
1. A fabricating method of a pixel structure, comprising:
- providing a substrate, having a plurality of pixel areas arranged in an array;
forming a scan line and a gate electrode in each of the pixel areas;
forming a gate insulation layer, covering the scan line and the gate electrode;
forming a semiconductor layer on the gate insulation layer above the gate electrode;
forming a data line, a source, and a drain in each of the pixel areas, the source and the drain being formed on two sides of the semiconductor layer;
forming a first passivation layer on the substrate, the first passivation layer covering the data line, the source, and the drain;
forming a common line on the first passivation layer, the common line overlapping with at least a portion of the data line;
forming a common electrode on the common line, the common electrode being electrically connected with the common line;
forming a second passivation layer, covering the common electrode and the common line;
forming a contact window in the second passivation layer above the drain, the contact window exposing the drain; and
forming a pixel electrode in each of the pixel areas, the pixel electrode being electrically connected with the drain through the contact window.
1 Assignment
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Accused Products
Abstract
In a fabricating method of a pixel structure, a scan line and a gate electrode are formed in each pixel area of a substrate. A gate insulation layer is formed to cover the scan line and gate electrode. A semiconductor layer is formed on the gate insulation layer above the gate electrode. A data line, source and drain are formed in each pixel area. A first passivation layer covers the data line, source and drain. A common line is formed on the first passivation layer and overlaps with at least a portion of the data line. A common electrode is formed on and electrically connected with the common line. A second passivation layer covers the common electrode and common line. A contact window is formed in the second passivation layer above the drain to expose the drain. A pixel electrode is electrically connected with the drain through the contact window.
4 Citations
19 Claims
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1. A fabricating method of a pixel structure, comprising:
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providing a substrate, having a plurality of pixel areas arranged in an array; forming a scan line and a gate electrode in each of the pixel areas; forming a gate insulation layer, covering the scan line and the gate electrode; forming a semiconductor layer on the gate insulation layer above the gate electrode; forming a data line, a source, and a drain in each of the pixel areas, the source and the drain being formed on two sides of the semiconductor layer; forming a first passivation layer on the substrate, the first passivation layer covering the data line, the source, and the drain; forming a common line on the first passivation layer, the common line overlapping with at least a portion of the data line; forming a common electrode on the common line, the common electrode being electrically connected with the common line; forming a second passivation layer, covering the common electrode and the common line; forming a contact window in the second passivation layer above the drain, the contact window exposing the drain; and forming a pixel electrode in each of the pixel areas, the pixel electrode being electrically connected with the drain through the contact window. - View Dependent Claims (2, 3, 4, 5)
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6. A pixel structure, disposed on a substrate having a plurality of pixel areas arranged in an array, the pixel structure being disposed in each of the pixel areas, the pixel structure comprising:
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a scan line and a gate electrode, disposed in each of the pixel areas; a gate insulation layer, covering the scan line and the gate electrode; a semiconductor layer, disposed on the gate insulation layer above the gate electrode; a data line, a source, and a drain, disposed in each of the pixel areas, the source and the drain being disposed on two sides of the semiconductor layer; a first passivation layer, covering the data line, the source, and the drain; a common line, disposed on the first passivation layer and overlapping with at least a portion of the data line; a common electrode, disposed on and electrically connected with the common line; a second passivation layer, covering the common electrode and the common line, wherein a contact window is located in the second passivation layer above the drain; and a pixel electrode, disposed in each of the pixel areas, the pixel electrode being electrically connected with the drain through the contact window. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification