Substrate symmetrical silicide source/drain surrounding gate transistor
First Claim
Patent Images
1. A vertical transistor comprising:
- a first terminal of the transistor consisting of a first silicide element on a semiconductor body comprising silicon;
a second terminal of the transistor overlying the first terminal and consisting of a second silicide element;
a channel region of the transistor separating the first and second terminals;
a gate terminal of the transistor having an inside surface completely surrounding the channel region; and
a dielectric separating the channel region from the gate terminal.
1 Assignment
0 Petitions
Accused Products
Abstract
Field effect transistors described herein include first and second terminals vertically separated by a channel region. The first and second terminals comprise first and second silicide elements respectively. The first silicide element prevents the migration of carriers from the first terminal into the underlying semiconductor body or adjacent devices which can activate parasitic devices. The first silicide element is also capable of acting as a low resistance conductive line for interconnecting devices or elements. The second silicide element provides a low resistance contact between the second terminal and overlying elements.
44 Citations
20 Claims
-
1. A vertical transistor comprising:
-
a first terminal of the transistor consisting of a first silicide element on a semiconductor body comprising silicon; a second terminal of the transistor overlying the first terminal and consisting of a second silicide element; a channel region of the transistor separating the first and second terminals; a gate terminal of the transistor having an inside surface completely surrounding the channel region; and a dielectric separating the channel region from the gate terminal.
-
-
2. A transistor comprising:
-
a first terminal of the transistor comprising a first silicide element on a semiconductor body comprising silicon; a second terminal of the transistor overlying the first terminal and comprising a second silicide element; a channel region of the transistor separating the first and second terminals; a gate terminal of the transistor having an inside surface surrounding the channel region; and a dielectric separating the channel region from the gate terminal, wherein the channel region comprises intrinsically doped semiconductor material contacting the first and second silicide elements. - View Dependent Claims (3, 4, 5)
-
-
6. A transistor comprising:
-
a first terminal of the transistor comprising a first silicide element on a semiconductor body comprising silicon; a second terminal of the transistor overlying the first terminal and comprising a second silicide element; a channel region of the transistor separating the first and second terminals; a gate terminal of the transistor having an inside surface surrounding the channel region; and a dielectric separating the channel region from the gate terminal, wherein the gate terminal comprises doped silicon material and a silicide conductor on the doped silicon material, the silicide conductor having a top surface co-planar with a top surface of the second silicide element. - View Dependent Claims (7)
-
-
8. A transistor comprising:
-
a first terminal of the transistor comprising a first silicide element on a semiconductor body comprising silicon; a second terminal of the transistor overlying the first terminal and comprising a second silicide element; a channel region of the transistor separating the first and second terminals; a gate terminal of the transistor having an inside surface surrounding the channel region; and a dielectric separating the channel region from the gate terminal, wherein the channel region has a core comprising germanium, and a shell surrounding the core and comprising silicon.
-
-
9. A transistor comprising:
-
a first terminal of the transistor comprising a first silicide element on a semiconductor body comprising silicon; a second terminal of the transistor overlying the first terminal and comprising a second silicide element; a channel region of the transistor separating the first and second terminals; a gate terminal of the transistor having an inside surface surrounding the channel region; and a dielectric separating the channel region from the gate terminal; and further comprising a source contact on the second silicide element of the second terminal.
-
-
10. A transistor comprising:
-
a first terminal of the transistor comprising a first silicide element on a semiconductor body comprising silicon; a second terminal of the transistor overlying the first terminal and comprising a second silicide element; a channel region of the transistor separating the first and second terminals; a gate terminal of the transistor having an inside surface surrounding the channel region; and a dielectric separating the channel region from the gate terminal; and further comprising a drain contact on the first silicide element of the first terminal.
-
-
11. A method for manufacturing a transistor, the method comprising:
-
providing a semiconductor body comprising silicon; forming a first terminal of the transistor on the semiconductor body, a second terminal of the transistor overlying the first terminal, and a channel region of the transistor separating the first and second terminals, wherein forming the first terminal comprises forming a first silicide element in the semiconductor body and separating the channel region from an underlying portion of the semiconductor body; forming a gate terminal of the transistor having an inside surface surrounding the channel region; and forming a dielectric separating the channel region from the gate terminal, wherein the channel region comprises intrinsically doped semiconductor material contacting the first and second silicide elements.
-
-
12. A method for manufacturing a transistor, the method comprising:
-
providing a semiconductor body comprising silicon; forming a first terminal of the transistor on the semiconductor body, a second terminal of the transistor overlying the first terminal, and a channel region of the transistor separating the first and second terminals, wherein forming the first terminal comprises forming a first silicide element in the semiconductor body and separating the channel region from an underlying portion of the semiconductor body; forming a gate terminal of the transistor having an inside surface surrounding the channel region; and forming a dielectric separating the channel region from the gate terminal, wherein; forming the first terminal further comprises forming a first doped region on the semiconductor body before forming the first silicide element, wherein forming the first silicide element separates the first doped region from the semiconductor body; and forming the second terminal further comprises forming a second doped region on the channel region before forming the second silicide element, wherein forming the second silicide element comprises forming the second silicide element on the second doped region. - View Dependent Claims (13, 14, 15, 16, 17, 18)
-
-
19. A method for manufacturing a transistor, the method comprising:
-
providing a semiconductor body comprising silicon; forming a first terminal of the transistor on the semiconductor body, a second terminal of the transistor overlying the first terminal, and a channel region of the transistor separating the first and second terminals, wherein forming the first terminal comprises forming a first silicide element in the semiconductor body and separating the channel region from an underlying portion of the semiconductor body; forming a gate terminal of the transistor having an inside surface surrounding the channel region; and forming a dielectric separating the channel region from the gate terminal, wherein; forming the channel region comprises growing the channel region on the semiconductor body using a nano-wire growth technique.
-
-
20. A method for manufacturing a transistor, the method comprising:
-
providing a semiconductor body comprising silicon; forming a first terminal of the transistor on the semiconductor body, a second terminal of the transistor overlying the first terminal, and a channel region of the transistor separating the first and second terminals, wherein forming the first terminal comprises forming a first silicide element in the semiconductor body and separating the channel region from an underlying portion of the semiconductor body; forming a gate terminal of the transistor having an inside surface surrounding the channel region; and forming a dielectric separating the channel region from the gate terminal, wherein; the channel region has a core comprising germanium, and a shell surrounding the core and comprising silicon.
-
Specification