Semiconductor resonators with electromagnetic and environmental shielding and methods of forming same

• US 8,164,159 B1
• Filed: 07/16/2010
• Issued: 04/24/2012
• Est. Priority Date: 07/18/2009
• Status: Active Grant

• Current Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Original Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Inventors: McCorquodale, Michael Shannon, Gupta, Vidyabhusan, O'Day, Justin, Fayyaz, Nader, Carichner, Gordon, Armstrong, William Eddie
• Primary Examiner(s): FOURSON III, GEORGE R
• Application Number:
  US12/838,158
• Time in Patent Office: 648 Days
• Field of Search: 257/E21.022, 257/531, 257/659, 438/381, 438/454
• US Class Current: 257/531
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/86 controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
• CPC Class Codes: H03B 5/1215 the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/1234 and comprising means for varying the output amplitude of the generator H03B5/1278 takes precedence
• CPC Class Codes: H03B 5/124 the means comprising a voltage dependent capacitance

Abstract

A reference signal generator includes an integrated circuit substrate having a semiconductor resonator therein. The resonator includes an inductor extending adjacent a first surface of the integrated circuit substrate. A vertically-stacked composite of at least first and second electrically insulating dielectric layers is provided on the integrated circuit substrate. The vertically-stacked composite covers a portion of the first surface, which extends opposite the inductor. A first electrically conductive shielding layer is provided on a portion of the second electrically insulating dielectric layer extending opposite the inductor. The first electrically conductive shielding layer may encapsulate exposed portions of the first and second electrically insulating dielectric layers. The shielding layer may operate as an electromagnetic shield between the inductor and an external structure, such as an integrated circuit package, and also shield against environmental contamination (e.g., external moisture penetration).

Claims

1. A reference signal generator, comprising:

an integrated circuit substrate having a semiconductor resonator therein, said semiconductor resonator comprising an inductor extending adjacent a first surface of said integrated circuit substrate;

a vertically stacked composite of at least first and second electrically insulating dielectric layers having respective thicknesses of greater than about five microns per layer, covering a portion of the first surface of said integrated circuit substrate extending opposite the inductor; and

a first electrically conductive shielding layer on a portion of the second electrically insulating dielectric layer extending opposite the inductor.

2. The generator of claim 1, wherein each of the first and second electrically insulating dielectric layers has a thickness of greater than about 10 microns.

3. The generator of claim 1, wherein said vertically stacked composite of at least first and second electrically insulating dielectric layers has a combined thickness of greater than about 20 microns.

4. The generator of claim 1, further comprising a second electrically conductive shielding layer on at least a portion of a second surface of said integrated circuit substrate extending opposite the first surface.

5. The generator of claim 4, wherein the inductor is sandwiched between the first and second electrically conductive shielding layers.

6. The generator of claim 1, wherein the first and second electrically insulating dielectric layers have thicknesses of greater than about 15 microns and 10 microns, respectively.

7. The generator of claim 5, wherein the first electrically conductive shielding layer comprises a first metal and the second electrically conductive shielding layer comprises a second metal having a lower conductivity relative to the first metal.

8. The generator of claim 1, further comprising an electrically conductive guard ring surrounding the inductor in said integrated circuit substrate.

9. The generator of claim 1, wherein the second electrically insulating dielectric layer has smaller lateral dimensions relative to the first electrically insulating dielectric layer.

10. The generator of claim 9, wherein the second and first electrically insulating dielectric layers are encapsulated on said integrated circuit substrate by said first electrically conductive shielding layer.

11. The generator of claim 9, wherein said vertically stacked composite of at least first and second electrically insulating dielectric layers comprises a third electrically insulating dielectric layer on the second electrically insulating dielectric layer;

wherein the third electrically insulating dielectric layer has smaller lateral dimensions relative to the second electrically insulating dielectric layer; and

wherein said first electrically conductive shielding layer extends directly on the third electrically insulating dielectric layer.

12. The generator of claim 11, wherein the third and second electrically insulating dielectric layers are encapsulated on said integrated circuit substrate by said electrically conductive shielding layer.

13. The generator of claim 1, further comprising an electrically insulating passivation layer encapsulating said first electrically conductive shielding layer, said electrically insulating passivation layer comprising a photopatternable spin-on silicone material.

14. The generator of claim 13, wherein the first and second electrically conductive shielding layers comprise benzocyclobutane.

15. The generator of claim 3, wherein said integrated circuit substrate comprises a semiconductor substrate and an interlayer insulating layer on the semiconductor substrate;

and wherein the inductor is embedded within the interlayer insulating layer.

16. The generator of claim 15, further comprising an electrically insulating seal ring surrounding said vertically stacked composite of at least first and second electrically insulating dielectric layers, said electrically insulating seal ring extending from an upper surface of the interlayer insulating layer onto an upper surface of said first electrically conductive shielding layer.

17. The generator of claim 16, wherein the interlayer insulating layer comprises a silicon nitride layer extending to the upper surface;

and wherein said electrically insulating seal ring comprises silicon nitride.

18. An integrated circuit device, comprising:

an integrated circuit substrate;

an interlayer insulating layer on said integrated circuit substrate;

an inductor in said interlayer insulating layer;

a metal seal ring in said interlayer insulating layer, said metal seal ring surrounding said inductor;

a vertically stacked composite of at least first and second electrically insulating dielectric layers having respective thicknesses of greater than about five microns per layer, covering said inductor; and

a metal shielding layer that encapsulates said vertically stacked composite of at least first and second electrically insulating dielectric layers and forms a metallic bond with said metal seal ring.

19. The device of claim 18, wherein said metal shield ring and said inductor extend adjacent an upper surface of said interlayer insulating layer;

and wherein said metal shielding layer contacts a sidewall of the first electrically insulating dielectric layer and forms a metallic bond with an upper surface of said metal seal ring.

20. The device of claim 19, wherein a portion of the upper surface of said metal seal ring extends between said interlayer insulating layer and said vertically stacked composite of at least first and second electrically insulating dielectric layers.