Power semiconductor devices integrated with clamp diodes sharing same gate metal pad

• US 8,164,162 B2
• Filed: 06/11/2009
• Issued: 04/24/2012
• Est. Priority Date: 06/11/2009
• Status: Active Grant

• Current Assignee: Force Mos Technology Co., Ltd.
• Original Assignee: Force Mos Technology Co., Ltd.
• Inventors: Hsieh, Fu-Yuan
• Primary Examiner(s): Kraig, William F
• Application Number:
  US12/457,471
• Publication Number:
  US 20100314681A1
• Time in Patent Office: 1,048 Days
• Field of Search: 257/341, 257/355, 257/356, 257/497, 257/498, 257/551, 257/577, 257/578, 257/603, 257/605, 438/199, 438/270
• US Class Current: 257/577
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/4238 : characterised by the surface lay-out
• CPC Class Codes: H01L 29/456 : on silicon
• CPC Class Codes: H01L 29/7397 : and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7808 : the other device being a breakdown diode, e.g. Zener diode
• CPC Class Codes: H01L 29/7809 : having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7811 : with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/866 : Zener diodes
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12035 : Zener diode
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

A structure of power semiconductor device integrated with clamp diodes sharing same gate metal pad is disclosed. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon.

Claims

1. A vertical semiconductor power IGBT device comprising a plurality of trenched gates in a silicon layer surrounded by emitter regions with a first type conductivity in active area encompassed in base regions with a second type conductivity, further comprising:

a first insulating layer serving as a gate oxide lining an inner surface of openings for said trenched gates;

a second insulating layer functioning as a thick oxide interlayer;

a plurality of trench emitter-base contacts filled with a barrier layer and tungsten plugs;

an emitter metal layer connected to the emitter regions and the base regions via said trench emitter-base contacts;

a gate-emitter clamp diode connected between a first gate metal and said emitter metal layer, composed of multiple back-to-back Zener diodes disposed inside of an edge termination area;

a gate-collector clamp diode connected between a second gate metal and a first collector metal, composed of multiple back-to-back polysilicon Zener diodes disposed outside of said edge termination area without having said polysilicon zener diodes or said second gate metal cross over said edge termination area;

said first collector metal connected to a front side of said silicon layer via a trench collector contact filled with said barrier layer and another tungsten plug;

a second collector metal layer formed on a back side of said silicon layer, and

said first and second gate metals connected together through multiple metal stripes with metal gap between two adjacent metal stripes.

2. The IGBT of claim 1, wherein said IGBT is a PT IGBT formed in the front side of said silicon layer, said silicon layer being comprised of a substrate heavily doped with said second type conductivity, a first epitaxial layer grown on said substrate and doped with said first type conductivity, and a second epitaxial layer grown on said first epitaxial layer and doped with said first type conductivity, having a doping concentration lower than said first epitaxial layer.

3. The IGBT of claim 1, wherein said IGBT is a NPT IGBT form in the front side of said silicon layer, said silicon layer being comprised of a lightly doped substrate with said first type conductivity, wherein the back side of said lightly doped substrate is heavily doped with said second type conductivity.

4. The IGBT of claim 1, wherein said IGBT is a NPT IGBT formed in the front side of said silicon layer, said silicon layer being comprised of a lightly doped substrate with said first type conductivity, wherein the back side of said lightly doped substrate is alternately heavily doped with said first and second type conductivity to provide an integrated collector shorting diode with the IGBT device.

5. The IGBT of claim 1, wherein a gate metal runner also serving as a metal field plate is deposited over a deep guard ring in said edge termination area.