Device and technique for transistor well biasing

• US 8,164,378 B2
• Filed: 05/06/2008
• Issued: 04/24/2012
• Est. Priority Date: 05/06/2008
• Status: Expired due to Fees

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Refaeli, Jehoda, De Barros Soldera, Jefferson Daniel, Pietri, Stefano, Olmos, Alfredo
• Primary Examiner(s): Donovan, Lincoln
• Assistant Examiner(s): O TOOLE, COLLEEN J
• Application Number:
  US12/115,825
• Publication Number:
  US 20090278571A1
• Time in Patent Office: 1,449 Days
• Field of Search: 327/530, 327534-538, 327/540, 327/541, 327/407, 327/408
• US Class Current: 327/534
• CPC Class Codes: G05F 3/205 Substrate bias-voltage generators for static stores G11C5/146
• CPC Class Codes: G05F 3/24 wherein the transistors are of the field-effect type only G05F3/205, G05F3/26, G05F3/30 take precedence
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET
• CPC Class Codes: H03K 5/2472 using field effect transistors H03K5/2436 takes precedence

Abstract

A method includes receiving a set of voltages comprising at least a first voltage, a second voltage, and a third voltage and biasing a well of a transistor based on the extreme voltage of the set of voltages. Biasing the well of the transistor can include concurrently providing a first signal and a second signal based on a comparison of the first voltage and the second voltage and selectively coupling the well of the transistor to a source of the extreme voltage of the set of voltages based on the first signal, the second signal, and the third voltage. An electronic device comprises a transistor and a power switching module. The power switching module includes a set of inputs, each input configured to receive a corresponding one of a set of voltages comprising at least a first voltage, a second voltage, and a third voltage, and includes an output coupled to a well of the transistor, the output configured to provide the extreme voltage of the set of voltages.

Claims

1. An electronic device comprising:

a transistor; and

a power switching module comprising;

a set of inputs, each input configured to receive a corresponding one of a set of voltages comprising at least a first voltage, a second voltage, and a third voltage; and

an output coupled to a well of the transistor, the output configured to provide the extreme voltage of the set of voltages;

a comparator comprising a first input to receive the first voltage, a second input to receive the second voltage, a first output to provide a first signal and a second output to provide a second signal, the comparator to configure the first signal and the second signal based on a comparison of the first voltage and the second voltage; and

a switch circuit comprising a first input coupled to the first output of the comparator, a second input coupled to the second output of the comparator, and an output coupled to the output of the power switching module, the switch circuit configured to selectively couple the output of the power switching module to a source of the one of the first voltage, the second voltage or the third voltage based on first signal, the second signal, and the third voltage, and the switch circuit comprising;

a first transistor comprising a gate electrode coupled to the first input, a source electrode coupled to a source of the third voltage, a drain electrode, and a body coupled to the output of the power switching module;

a second transistor comprising a gate electrode coupled to the second input, a source electrode coupled to the drain electrode of the first transistor, a drain electrode coupled to the first input, and a body coupled to the output of the power switching module;

a third transistor comprising a gate electrode coupled to the second input, a source electrode coupled to the source of the third voltage, a drain electrode, and a body coupled to the output of the power switching module;

a fourth transistor comprising a gate electrode coupled to the first input, a source electrode coupled to the drain electrode of the third transistor, a drain electrode coupled to the second input, and a body coupled to the output of the power switching module;

a fifth transistor comprising a gate electrode coupled to the second input, a source electrode coupled to a source of the first voltage, a drain electrode coupled to the output of the power switching module, and a body coupled to the output of the power switching module;

a sixth transistor comprising a gate electrode coupled to the first input, a source electrode coupled to a source of the second voltage, a drain electrode coupled to the output of the power switching module, and a body coupled to the output of the power switching module;

a seventh transistor comprising a gate electrode coupled to the source of the first voltage, a source electrode coupled to the source of the third voltage, a drain electrode, and a body coupled to the output of the power switching module; and

an eighth transistor comprising a gate electrode coupled to the source of the second voltage, a source electrode coupled to the drain electrode of the seventh transistor, a drain electrode coupled to the output of the power switching module, and a body coupled to the output of the power switching module.