Analog bus driver and multiplexer

• US 8,164,663 B2
• Filed: 06/16/2006
• Issued: 04/24/2012
• Est. Priority Date: 06/17/2005
• Status: Expired due to Fees

• Current Assignee: California Institute of Technology
• Original Assignee: California Institute of Technology
• Inventors: Pain, Bedabrata, Hancock, Bruce, Cunningham, Thomas J.
• Primary Examiner(s): Tran, Nhan T
• Assistant Examiner(s): LE, TUAN H
• Application Number:
  US11/454,342
• Publication Number:
  US 20070012870A1
• Time in Patent Office: 2,139 Days
• Field of Search: 348294-310, 348/319, 250/208.1, 257290-294
• US Class Current: 348/294
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/6153 for colour signals
• CPC Class Codes: H04N 25/677 for reducing the column or line fixed pattern noise
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 3/1568 for disturbance correction or prevention within the image-sensor, e.g. biasing, blooming, smearing correction circuits H04N25/62

Abstract

For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light.

Claims

1. An analog bus driver and multiplexer circuit comprising:

an array of pixels, the pixels being read out by columns, each column comprising a source follower connected to a first bus common to the columns through a selection switch, and

a load switch such that a biasing current generated through a second bus flows through the load switch and the source follower without flowing through the selection switch when a column is selected.

2. The analog bus driver and multiplexer circuit according to claim 1, wherein the load switch is a plurality of dedicated load switches, each dedicated load switch placed in a respective column.

3. The analog bus driver and multiplexer circuit according to claim 2, wherein the biasing current establishes a current path between the dedicated load switch and the source follower of a column when the column is selected, the current path being separate from a voltage output path of the selection switch.

4. The analog bus driver and multiplexer circuit according to claim 3, wherein the selection switch is connected between the load switch and the source follower.

5. The analog bus driver and multiplexer circuit according to claim 4, wherein the source follower, the selection switch and the load switch are field effect transistors (FET).

6. The analog bus driver and multiplexer circuit according to claim 5, wherein the selection switch is a composite access FET comprising an n-type FET and a p-type FET, the n-type FET being connected in parallel with the p-type FET.

7. The analog bus driver and multiplexer circuit according to claim 2, further comprising a transistor between the load switch and the source follower in a current path between the load switch and the source follower.

8. The analog bus driver and multiplexer circuit according to claim 2, wherein the second bus is a power bus.

9. The analog bus driver and multiplexer circuit according to claim 8, wherein the power bus is connected to the load switch.

10. The analog bus driver and multiplexer circuit according to claim 8, wherein the power bus is connected to the source follower.

11. The analog bus driver and multiplexer circuit according to claim 1, wherein the load switch is a common load switch common to the columns.

12. The analog bus driver and multiplexer circuit according to claim 11, wherein a current path between the common load switch and the source follower of a column when the column is selected is separate from a voltage output path of the selection switch.

13. The analog bus driver and multiplexer circuit according to claim 12, wherein the common load switch is operated through a third bus.

14. The analog bus driver and multiplexer circuit according to claim 12, wherein the selection switch is connected between the load switch and the source follower but outside the current path between the load switch and the source follower.

15. The analog bus driver and multiplexer circuit according to claim 14, wherein the source follower, the selection switch and the load switch are field effect transistors (FET).

16. The analog bus driver and multiplexer circuit according to claim 15, wherein the selection switch is a composite FET.

17. The analog bus driver and multiplexer circuit according to claim 11, further comprising a transistor between the load switch and the source follower in a current path between the load switch and the source follower.

18. The analog bus driver and multiplexer circuit according to claim 11, wherein the second bus is a power bus.

19. The analog bus driver and multiplexer circuit according to claim 18, wherein the power bus is connected to the common load switch.

20. The analog bus driver and multiplexer circuit according to claim 1, wherein the array of pixels is on a focal plane.

21. A detector of radiation comprising the analog bus driver and multiplexer circuit according to claim 1.

22. The detector of radiation of claim 21, wherein the array of pixels of the analog bus driver and multiplexer circuit is on a focal plane.

23. The detector of radiation of claim 22, further comprising a one-dimensional array of column sample and hold circuits, row decoder and logic circuit arrays, and column decoder and logic circuit arrays to access the pixels in the array of pixels for reading.

24. The detector of radiation of claim 21, wherein the source follower in each column of the analog bus driver and multiplexer circuit is connected to an operational amplifier.

25. The detector of radiation of claim 21, further comprising a Miller effect reducing capacitor and an operational amplifier having an operational amplifier input. wherein the source follower is connected to the first bus, and the Miller effect reducing capacitor is connected in series with the first bus and is connected to the operational amplifier input.

26. The detector of radiation of claim 25, wherein the Miller effect reducing capacitor is connected in series with the first bus on one end and is connected to the operational amplifier input on another end.

27. The detector ot radiation of claim 25, wherein the Miller effect reducing capacitor is connected with the selection switch in each column of the array of pixels.

28. The analog bus driver and multiplexer circuit of claim 1 further comprising:

a switched capacitor gain stage common to the columns, each source follower being connected to the switched capacitor gain stage.

wherein the switched capacitor gain stage comprises an operational amplifier and wherein the source follower is connected through the operational amplifier to the first bus. the first bus being a voltage-carrying bus capacitively coupled to the operational amplifier.