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Predictive DMA data transfer

  • US 8,166,212 B2
  • Filed: 06/26/2007
  • Issued: 04/24/2012
  • Est. Priority Date: 06/26/2007
  • Status: Active Grant
First Claim
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1. An image processing device comprising:

  • a marking engine;

    an image compressor configured to compress image data;

    an image decompressor configured to decompress image data previously compressed by the image compressor;

    an electronic memory organized as storage blocks each having a storage block size;

    a direct memory access (DMA) engine configured to transfer compressed image data from the image compressor into the electronic memory and to transfer compressed image data from the electronic memory to the image decompressor;

    a central processing unit (CPU) configured to coordinate operations of at least the marking engine and DMA engine to cause the marking engine to generate markings in accordance with selected image data input to the image compressor; and

    a transfer block size estimator configured to adjust a transfer block size used in transfer of compressed image data from the image compressor into the electronic memory based on analysis of previous transfers of compressed image data from the image compressor into the electronic memory, the DMA engine being further configured to transfer a unit of compressed image data having the transfer block size from the image compressor into the electronic memory without intervention of the CPU.

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