Calibrating a system by setting difference between signals

• US 8,169,249 B2
• Filed: 09/23/2011
• Issued: 05/01/2012
• Est. Priority Date: 12/29/2009
• Status: Active Grant

• Current Assignee: O2 Micro International Limited (O2 Micro Incorporated)
• Original Assignee: O2 Micro International Limited (O2 Micro Incorporated)
• Inventors: Li, Guoxing, Liu, Quanwang, Liu, Shiqiang, Hu, Juncai
• Primary Examiner(s): Wells, Kenneth B.
• Application Number:
  US13/242,307
• Publication Number:
  US 20120013366A1
• Time in Patent Office: 221 Days
• Field of Search: 327/307, 330/9
• US Class Current: 327/307
• CPC Class Codes: G01R 19/0084 measuring voltage only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: G01R 35/005 Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references G01R33/0035, G01R35/002 take precedence

Abstract

In a signal monitoring system, a circuit includes an input terminal and an output terminal. In addition, a processor coupled to the circuit is operable for calculating a parameter indicative of an error factor of the circuit by setting a level difference between an input signal at the input terminal and an output signal at the output terminal to a predetermined level.

Claims

1. A system comprising:

a circuit comprising;

a first input terminal;

a first output terminal; and

an amplifier coupled to said first input terminal via a first resistive component, and coupled to said first output terminal via a second resistive component;

a multiplexer coupled to said circuit and operable for providing a selected signal that is selected from a reference signal and a plurality of real-time input signals to said circuit, and wherein each real-time input signal of said plurality of real-time input signals indicates a voltage level at a terminal of a corresponding battery cell of said battery cells; and

a processor coupled to said circuit and operable for calibrating said system, said calibrating comprising setting a level difference between a first input signal at said first input terminal and a first output signal at said first output terminal to a first predetermined level.

2. The system as claimed in claim 1, wherein said circuit further comprises a second input terminal and a second output terminal, and wherein said amplifier is coupled to said second output terminal via a third resistive component and coupled to said second input terminal via a fourth resistive component.

3. The system as claimed in claim 1, wherein said system is calibrated based on a parameter indicative of an error factor of said circuit.

4. The system as claimed in claim 3, wherein said error factor comprises an input voltage offset of said amplifier.

5. The system as claimed in claim 3, wherein said circuit further comprises a second input terminal, and wherein said parameter is calculated by setting said level difference between said first input signal and said first output signal to said first predetermined level and setting a level difference between said first input signal and a second input signal at said second input terminal to a second predetermined level.

6. The system as claimed in claim 3, wherein said circuit further comprises a second input terminal and a second output terminal, and wherein a real-time level difference between said first input signal and a second input signal at said second input terminal is calculated according to said parameter and also according to a real-time level difference between said first output signal and a second output signal at said second output terminal.

7. The system as claimed in claim 3, wherein a value of said parameter varies as an ambient condition varies.

8. The system as claimed in claim 1, wherein said circuit further comprises a second input terminal and a second output terminal, and wherein a voltage level difference between said first output terminal and said second output terminal is given by V_OUT2−

V_OUT1=(V_IN2−

V_IN1)*K₄+(V_IN1−

V_OUT1)*K₅−

V_OS/K₁, where V_OUT1 represents a voltage level at said first output terminal, V_OUT2 represents a voltage level at said second output terminal, V_IN1 represents a voltage level at said first input terminal, V_IN2 represents a voltage level at said second input terminal, V_OS represents a voltage offset of said circuit, K₁ represents a first resistance ratio of said circuit, K₄ represents a second resistance ratio of said circuit, and K₅ represents a third resistance ratio of said circuit.

9. The system as claimed in claim 1, further comprising:

an analog-to-digital converter coupled to said circuit and operable for providing a digital signal to said processor, wherein said digital signal indicates a level difference between said first output signal and a second output signal at a second output terminal of said circuit.

10. The system as claimed in claim 1, wherein said multiplexer is operable for providing said selected signal to a second input terminal of said circuit.

11. A method comprising:

setting a level difference between a first input signal at a first input terminal of a circuit and a first output signal at a first output terminal of said circuit to a first predetermined level, wherein said circuit comprises an amplifier coupled to said first input terminal via a first resistive component and coupled to said first output terminal via a second resistive component;

selecting a selected signal from a reference signal and a plurality of real-time input signals, wherein each real-time input signal of said plurality of real-time input signals indicates a voltage level at a terminal of a corresponding battery cell of a plurality of battery cells;

providing said selected signal to said circuit; and

calibrating a system based on said setting of said level difference.

12. The method as claimed in claim 11, further comprising:

setting a level difference between said first input signal and a second input signal at a second input terminal of said circuit to a second predetermined level;

calculating a parameter indicative of an error factor of said circuit based on said first and second predetermined levels; and

calibrating said system using said parameter.

13. The method as claimed in claim 12, wherein a value of said parameter varies as an ambient condition varies.

14. The method as claimed in claim 11, wherein said calibrating comprises calculating a real-time level difference between said first input signal and a second input signal at a second input terminal of said circuit according to a parameter indicative of an error factor of said circuit and according to a real-time level difference between said first output signal and a second output signal at a second output terminal of said circuit.

15. The method as claimed in claim 11, wherein said calibrating comprises calculating a voltage level difference between said first output terminal and a second output terminal of said circuit based on an equation:

V_OUT2−

V_OUT1=(V_IN2−

V_IN1)*K₄+(V_IN1−

V_OUT1)*K₅−

V_OS/K₁, where V_OUT1 represents a voltage level at said first output terminal, V_OUT2 represents a voltage level at said second output terminal, V_IN1 represents a voltage level at said first input terminal, V_IN2 represents a voltage level at a second input terminal of said circuit, V_OS represents a voltage offset of said circuit, K₁ represents a first resistance ratio of said circuit, K₄ represents a second resistance ratio of said circuit, and K₅ represents a third resistance ratio of said circuit.

16. The method as claimed in claim 11, further comprising:

providing said selected signal to a second input terminal of said circuit.

17. A system comprising:

a circuit comprising a first input terminal, a second input terminal, and a first output terminal, and operable for selectively receiving a first voltage level at a first detect terminal via said first input terminal and selectively receiving a second voltage level at a second detect terminal via said second input terminal, said circuit further comprising an amplifier coupled to said first input terminal via a first resistive component and coupled to said first output terminal via a second resistive component;

a multiplexer coupled to said circuit and operable for providing a selected signal that is selected from a reference signal and said second voltage level to said circuit, wherein said second voltage level comprises a plurality of real-time input signals, and each real-time input signal indicates a voltage level at a terminal of a corresponding battery cell of a plurality of battery cells; and

a processor coupled to said circuit and operable for calibrating said system by setting a voltage level difference between said first input terminal and said first output terminal to a first predetermined level, and operable for calculating a difference between said first and second voltage levels.

18. The system as claimed in claim 17, wherein said circuit further comprises a second output terminal of said circuit, and wherein said amplifier is coupled to said second output terminal via a third resistive component and coupled to said second input terminal via a fourth resistive component.

19. The system as claimed in claim 17, wherein said system is also calibrated by setting a voltage level difference between said first input terminal and said second input terminal to a second predetermined level.

20. The system as claimed in claim 17, wherein said system is calibrated based on a relationship between four voltage levels respectively at said first input terminal, said second input terminal, said first output terminal, and a second output terminal of said circuit.

21. The system as claimed in claim 20, wherein said system is calibrated by determining an error factor of said system according to said relationship, and wherein said error factor varies as an ambient condition varies.

22. The system as claimed in claim 17, wherein said circuit further comprises a second output terminal, and wherein a voltage level difference between said first output terminal and said second output terminal is given by V_OUT2−

V_OUT1=(V_IN2−

V_IN1)*K₄+(V_IN1−

V_OUT1)*K₅−

V_OS/K₁, where V_OUT1 represents a voltage level at said first output terminal, V_OUT2 represents a voltage level at said second output terminal, V_IN1 represents a voltage level at said first input terminal, V_IN2 represents a voltage level at said second input terminal, V_OS represents a voltage offset of said circuit, K₁ represents a first resistance ratio of said circuit, K₄ represents a second resistance ratio of said circuit, and K₅ represents a third resistance ratio of said circuit.

23. The system as claimed in claim 17, further comprising:

an analog-to-digital converter coupled to said circuit and operable for providing a digital signal to said processor, wherein said digital signal indicates a voltage level difference between said first output terminal and said second output terminal.

24. The system as claimed in claim 17,

wherein said multiplexer is operable for providing said selected signal to said second input terminal.