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Hardware architecture for video conferencing

  • US 8,169,464 B2
  • Filed: 05/08/2009
  • Issued: 05/01/2012
  • Est. Priority Date: 11/20/2006
  • Status: Active Grant
First Claim
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1. A video processing system for a multipoint control unit, comprising:

  • a plurality of signal processors that perform processing of data representative of video images, the plurality of signal processors being interconnected via switches that choose between unicast and multicast transmission of received data; and

    each of the switches maintains a representation of a network topology of an entire architecture of the multipoint control unit of links between the signal processors allowing the switches to make routing decisions and determines an unicast or multicast format transmission of data for a next hop or hops.

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