Radio-frequency switch circuit

• US 8,170,500 B2
• Filed: 07/09/2009
• Issued: 05/01/2012
• Est. Priority Date: 09/25/2008
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Seshita, Toshiki, Wakimoto, Hirotsugu
• Primary Examiner(s): HSIEH, PING Y
• Application Number:
  US12/500,020
• Publication Number:
  US 20100073066A1
• Time in Patent Office: 1,027 Days
• Field of Search: 455/78, 455/62, 455/63.1, 455/63.3, 455/82, 455/83, 455/191.3, 455/333, 455/114.1, 455/114.2, 455/278.1, 455/296, 455/277.1, 455/197.1, 330/149, 330/150, 333/103, 333/104, 333/101, 333/262, 327/408, 327/430, 327/435, 327/436, 327/416, 327/427
• US Class Current: 455/78
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2217/0036 Means reducing energy consumption
• CPC Class Codes: H03K 2217/0054 Gating switches, e.g. pass gates
• CPC Class Codes: H04B 1/005 adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

A radio-frequency switch circuit of the invention includes: n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number; a radio-frequency leakage prevention resistor connected to a gate of the through FETs; a control signal line commonly connected to the gates of the n-stage through FETs connected to the same radio-frequency terminal; and a resistor connected to each of at least two of the control signal lines and connected to the radio-frequency leakage prevention resistor in series The two control signal lines are capacitively coupled between the resistor and the through FETs.

Claims

1. A radio-frequency switch circuit comprising:

an antenna terminal;

two or more radio-frequency terminals;

n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number;

a radio-frequency leakage prevention resistor, one end of the radio-frequency leakage prevention resistor being connected to a gate of the through FETs;

a control signal line commonly connected to another ends of the radio-frequency leakage prevention resistors; and

a resistor inserted in each of at least two of the control signal lines between the another end of the radio-frequency leakage prevention resistor and a control circuit supplying a control signal to the n-stage through FETs,

each portion of the two control signal lines being capacitively coupled between the resistor and the another end of the radio-frequency leakage prevention resistor.

2. The switch circuit according to claim 1, wherein the capacitive coupling is achieved by wiring the two control signal lines adjacently and in parallel.

3. The switch circuit according to claim 2, wherein shunt FETs are connected between each of the radio-frequency terminals and the ground, and a ground line, or a control signal line for the shunt FETs decoupled so as to be equivalent to the ground line in terms of radio frequency, is wired on both sides of the pair of control signal lines wired in parallel.

4. The switch circuit according to claim 3, wherein when the through FETs connected to one of the radio-frequency terminals are turned on, the shunt FET connected to the same radio-frequency terminal and the other through FETs connected to the other radio-frequency terminals are turned off, and the other shunt FETs connected to the other radio-frequency terminals are turned on.

5. The switch circuit according to claim 3, wherein the through FET, the radio-frequency leakage prevention resistor, the control signal line, the resistor, and the shunt FET are formed on a single semiconductor substrate.

6. The switch circuit according to claim 2, wherein the pair of control signal lines wired in parallel is capacitively coupled via a MIM (metal-insulator-metal) structure.

7. The switch circuit according to claim 1, wherein the control signal lines are laid out so that wiring lengths from the resistors to the through FETs connected to the resistors are generally equal.

8. The switch circuit according to claim 1, wherein the control signal line does not intersect other interconnects on which a radio-frequency signal is transmitted.

9. The switch circuit according to claim 1, wherein a radio-frequency signal having a phase difference with respect to a radio-frequency signal inputted from the radio-frequency terminal is applied to gates of other ones of the through FETs in off-state connected to another control signal line.

10. The switch circuit according to claim 9, wherein the phase difference is 60 degrees in a fundamental frequency.

11. The switch circuit according to claim 1, wherein at least one of the radio-frequency terminals is connected to a UMTS (Universal Mobile Telecommunications System) transceiver circuit, and at least one of the pair of resistors capacitively coupled to each other is inserted in the control signal line corresponding to a radio-frequency terminal connected to a UMTS transceiver circuit.

12. A radio-frequency switch circuit comprising:

an antenna terminal;

two or more radio-frequency terminals;

n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number;

a through FET radio-frequency leakage prevention resistor, one end of the through FET radio-frequency leakage prevention resistor being connected to a gate of the through FETs;

a through FET control signal line commonly connected to another ends of the through FET radio-frequency leakage prevention resistors;

a through FET resistor inserted in the through FET control signal line between the another end of the through FET radio-frequency leakage prevention resistor and a control circuit supplying a control signal to the n-stage through FETs;

m-stage shunt FETs connected in series between each of the radio-frequency terminals and the ground, where m is a natural number;

a shunt FET radio-frequency leakage prevention resistor, one end of the shunt FET radio-frequency leakage prevention resistor being connected to a gate of the shunt FETs;

a shunt FET control signal line commonly connected to another ends of the shunt FET radio-frequency leakage prevention resistors; and

a shunt FET resistor inserted in the shunt FET control signal line between the another end of the shunt FET radio-frequency leakage prevention resistor and the control circuit supplying a control signal to the m-stage shunt FETs,

each portion of the through FET control signal line and the shunt FET control signal line being capacitively coupled, the portion of the through FET control signal line being provided between the through FET resistor and the another end of the through FET radio-frequency leakage prevention resistor, and the portion of the shunt FET control signal line being provided between the shunt FET resistor and the another end of the shunt FET radio-frequency leakage prevention resistor.

13. The switch circuit according to claim 12, wherein the capacitive coupling is achieved by wiring the through FET control signal line and the shunt FET control signal line adjacently and in parallel.

14. The switch circuit according to claim 13, wherein the through FET control signal line and the shunt FET control signal line wired in parallel is capacitively coupled via a MIM (metal-insulator-metal) structure.

15. The switch circuit according to claim 12, wherein the through FET control signal line and the shunt FET control signal line do not intersect other interconnects on which a radio-frequency signal is transmitted.

16. The switch circuit according to claim 12, wherein a radio-frequency signal having a phase difference with respect to a radio-frequency signal inputted from the radio-frequency terminal is applied to gates of the shunt FETs in off-state connected to the shunt FET control signal line via the shunt FET control signal line capacitively coupled to the through FET control signal line connected to the gates of the through FETs in on-state connected to the radio-frequency terminal.

17. The switch circuit according to claim 16, wherein the phase difference is 60 degrees in a fundamental frequency.

18. The switch circuit according to claim 12, wherein the radio-frequency terminal, commonly connected to the through FETs and the shunt FETs connected, respectively, to the through FET control signal line and the shunt FET control signal line which are capacitively coupled to each other, is connected to a UMTS (Universal Mobile Telecommunications System) transceiver circuit.

19. The switch circuit according to claim 12, wherein when the through FETs connected to one of the radio-frequency terminals are turned on, the shunt FET connected to the same radio-frequency terminal and the other through FETs connected to the other radio-frequency terminals are turned off, and the other shunt FETs connected to the other radio-frequency terminals are turned on.

20. The switch circuit according to claim 12, wherein the through FET, the through FET radio-frequency leakage prevention resistor, the through FET control signal line, the through FET resistor, the shunt FET, the shunt FET radio-frequency leakage prevention resistor, the shunt FET control signal line, and the shunt FET resistor are formed on a single semiconductor substrate.