Master communication circuit, slave communication circuit, and data communicating method

• US 8,171,193 B2
• Filed: 03/27/2007
• Issued: 05/01/2012
• Est. Priority Date: 03/28/2006
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Yamada, Susumu
• Primary Examiner(s): Rinehart, Mark
• Assistant Examiner(s): Patel, Nimesh G
• Application Number:
  US11/692,062
• Publication Number:
  US 20070230334A1
• Time in Patent Office: 1,862 Days
• Field of Search: 710/106, 710/105, 710/110
• US Class Current: 710/105
• CPC Class Codes: G06F 13/4286 using a handshaking protocol, e.g. RS232C link

Abstract

A master communication circuit communicatively connected to a slave communication circuit, comprises a timer circuit that can detect a first time; a first output circuit that outputs a first output signal of one logical level for starting a detecting operation of the first time in the timer circuit, when a value transmitted to the slave communication circuit is one logical level, and for starting a detecting operation of a second time longer than the first time in the slave communication circuit; and a second output circuit that outputs a second output signal of the other logical level when the timer circuit detects the first time, wherein if a value of one logical level is transmitted to the slave communication circuit, the value of one logical level is transmitted to the slave communication circuit by not detecting the second time with the slave communication circuit, detecting the first time with the timer circuit, and outputting the second output signal with the second output circuit, and wherein if a value of the other logical level is transmitted to the slave communication circuit, the value of the other logical level is transmitted to the slave communication circuit by not detecting the first time with the timer circuit and detecting the second time with the slave communication circuit.

Claims

1. A master communication circuit communicatively connected to a slave communication circuit, comprising:

a first output circuit that outputs a first output signal of one logical level to initiate transmission of either a first logical value or a second logical value from the master communication circuit to the slave communication circuit;

a timer circuit that can detect a first time, the timer circuit starting a detecting operation of the first time when the first output signal is output to initiate transmission of the first logical value from the master communication circuit to the slave communication circuit;

a second output circuit that outputs a second output signal of another logical level when the timer circuit detects the first time, wherein

the output of the first output signal instructs the slave communication circuit to start a detecting operation of a second time longer than the first time, and wherein

the slave communication circuit receives the first logical value if the slave communication circuit does not detect the second time before the second output circuit outputs the second output signal, and wherein

the slave communication circuit receives the second logical value if the slave communication circuit detects the second time.

2. The master communication circuit of claim 1, the circuit being connectable to the slave communication circuit through one communication line that can hold a level of a signal output thereto, wherein

the first output circuit outputs the first output signal to the communication line so that the slave communication circuit starts the detecting operation of the second time, and wherein

the second output circuit outputs the second output signal to the communication line when the timer circuit detects the first time.

3. The master communication circuit of claim 2, wherein

the timer circuit is reset when the signal level of the communication line is changed from the one logical level to the other logical level.

4. The master communication circuit of claim 1, the circuit being connectable to the slave communication circuit through one communication line, further comprising:

a holding circuit that can hold the signal level of the communication line at a level of a signal when the signal is output to the communication line, wherein

the first output circuit outputs the first output signal to the communication line so that the slave communication circuit starts the detecting operation of the second time, and wherein

the second output circuit outputs the second output signal to the communication line when the timer circuit detects the first time.

5. The master communication circuit of claim 1, further comprising:

a wireless communication circuit that wirelessly transmits the first output signal output from the first output circuit or the second output signal output from the second output circuit to the slave communication circuit.

6. A slave communication circuit communicatively connected to a master communication circuit that can detect a first time, comprising:

a timer circuit that starts a detecting operation of a second time longer than the first time in accordance with a first output signal of one logical level transmitted from the master communication circuit; and

a reception circuit that outputs a first logical value if the timer circuit does not detect the second time and a second output signal of another logical level is transmitted from the master communication circuit since the master communication circuit detects the first time, the reception circuit outputting a second logical value if the timer circuit detects the second time.

7. The slave communication circuit of claim 6, the circuit being connectable to the master communication circuit through one communication line that can hold a level of an signal output thereto, further comprising:

an output circuit that outputs the second output signal to the communication line when the timer circuit detects the second time, wherein

when the signal level of the communication line is changed from the one logical level to the other logical level, the reception circuit outputs the first logical value if the timer circuit does not detect the second time and outputs the second logical value if the timer circuit detects the second time.

8. The slave communication circuit of claim 7, wherein

the timer circuit is reset when the signal level of the communication line is changed from the one logical level to the other logical level.

9. The slave communication circuit of claim 6, the circuit being connectable to the master communication circuit through one communication line, further comprising:

a holding circuit that can hold the signal level of the communication line at a level of a signal when the signal is output to the communication line; and

an output circuit that outputs the second output signal to the communication line when the timer circuit detects the second time, wherein

when the signal level of the communication line is changed from the one logical level to the other logical level, the reception circuit outputs the first logical value if the timer circuit does not detect the second time and outputs the second logical value if the timer circuit detects the second time.

10. The slave communication circuit of claim 6, further comprising:

an output circuit that outputs the second output signal when the timer circuit detects the second time;

a wireless communication circuit that receives the first or second output signal transmitted wirelessly from the master communication circuit; and

a memory circuit that stores the signal level of the signal transmitted from the master communication circuit or the signal output from the output circuit, wherein

when the signal level stored in the memory circuit is changed from the one logical level to the other logical level, the reception circuit outputs the first logical value if the timer circuit does not detect the second time and outputs the second logical value if the timer circuit detects the second time.

11. The slave communication circuit of claim 10, wherein

the wireless communication circuit is configured by a coil that detects the first or second output signal transmitted from the master communication circuit through a change in a magnetic field.

12. The slave communication circuit of claim 11, wherein

the coil generates a magnetic field in accordance with the second output signal output from the output circuit to reset the detecting operation of the first time in the master communication circuit, and wherein

the timer circuit is reset when the signal level stored in the memory circuit is changed from the one logical level to the other logical level.

13. The slave communication circuit of claim 10, wherein

the wireless communication circuit is configured by an electrode that detects the first or second output signal transmitted from the master communication circuit through a change in an electric field.

14. The slave communication circuit of claim 13, wherein

the electrode generates an electric field in accordance with the second output signal output from the output circuit to reset the detecting operation of the first time in the master communication circuit, and wherein

the timer circuit is reset when the signal level stored in the memory circuit is changed from the one logical level to the other logical level.

15. The slave communication circuit of claim 10, wherein

the wireless communication circuit transmits the second output signal output from the output circuit to the master communication circuit to reset the detecting operation of the first time in the master communication circuit, and wherein

the timer circuit is reset when the signal level stored in the memory circuit is changed from the one logical level to the other logical level.

16. A slave communication circuit communicatively connected to a master communication circuit that can detect a first time, comprising:

a timer circuit that starts a detecting operation of a second time shorter than the first time in accordance with a first output signal of one logical level transmitted from the master communication circuit when a first logical value is transmitted to the master communication circuit; and

an output circuit that outputs a second output signal of another logical level when the timer circuit detects the second time, wherein

the master communication circuit receives the first logical value if the master communication circuit does not detect the first time and the output circuit outputs the second output signal to the master communication circuit, and wherein

the master communication circuit receives a second logical value if the master communication circuit detects the first time.

17. The slave communication circuit of claim 16, the circuit being connectable to the master communication circuit through one communication line that can hold a level of an output signal, wherein

the output circuit outputs the second output signal to the communication line when the timer circuit detects the second time.

18. The slave communication circuit of claim 17, wherein

the timer circuit is reset when the signal level of the communication line is changed from the one logical level to the other logical level since the output circuit outputs the second output signal to the communication line or the master communication circuit detects the first time and outputs the second output signal to the communication line.

19. The slave communication circuit of claim 16, the circuit being connectable to the master communication circuit through one communication line, further comprising:

a holding circuit that can hold the signal level of the communication line at a level of a signal when the signal is output to the communication line, wherein

the output circuit outputs the second output signal to the communication line when the timer circuit detects the second time.

20. The slave communication circuit of claim 16, further comprising:

a wireless communication circuit that receives the first output signal transmitted wirelessly from the master communication circuit or wirelessly transmits the second output signal output from the output circuit.