Integrated circuit with reduced electromagnetic interference induced by memory access and method for the same

• US 8,171,332 B2
• Filed: 05/12/2009
• Issued: 05/01/2012
• Est. Priority Date: 05/12/2009
• Status: Active Grant

• Current Assignee: Himax Technologies Ltd. (Himax Technologies Incorporated)
• Original Assignee: Himax Technologies Ltd. (Himax Technologies Incorporated)
• Inventors: Shen, Meng-Wei
• Primary Examiner(s): Zaman, Faisal M
• Application Number:
  US12/464,291
• Publication Number:
  US 20100293405A1
• Time in Patent Office: 1,085 Days
• Field of Search: 713/401, 713/500, 713/501, 713/600
• US Class Current: 713/500
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 5/18 Timing circuits for raster scan displays specially adapted for television H04N ; synchronisation between the display unit and other display units, videodisc player G09G5/12
• CPC Class Codes: G09G 5/39 Control of the bit-mapped memory
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

The invention provides an integrated circuit with reduced electromagnetic interference induced by memory access. The integrated circuit includes a random code generator, a request receiver and a memory unit. The random code generator generates a plurality of random codes according to a predetermined delay parameter. The request receiver obtains an input clock signal according to a plurality of data requests and spreads the spectrum of the input clock signal based on the random codes to derive a non-periodic output clock signal. The memory unit accesses image data to be displayed in response to the data requests and the output clock signal.

Claims

1. An integrated circuit with reduced electromagnetic interference induced by memory access, comprising:

a random code generator for generating a plurality of random codes according to a predetermined delay parameter;

a request receiver coupled to the random code generator for obtaining an input clock signal according to a plurality of data requests and spreading the spectrum of the input clock signal based on the random codes to derive a non-periodic output clock signal;

a memory unit for accessing image data to be displayed in response to the data requests and the output clock signal,

wherein the frequency spectrum of the output clock signal is wider than that of the input clock signal, and

wherein the request receiver comprises;

a request sorter for providing a read flag or a write flag according to the data requests and sorting the data requests being routed to the memory unit, wherein the read flag is indicative of executing reading of the memory unit and the write flag is indicative of executing writing to the memory unit;

a timing generator coupled to the request sorter for generating the input clock signal according to the data requests and the corresponding flag; and

a delay generator coupled to the timing generator for generating a plurality of phase delays respectively corresponding to each random code and deriving the output clock signal applied to the memory unit by individually delaying each pulse of the input clock signal by each phase delay.

2. The integrated circuit as claimed in claim 1, further comprising:

a driver module coupled to the memory unit for scanning the memory unit and generating a display signal in response thereto.

3. The integrated circuit as claimed in claim 2, wherein the integrated circuit is a display driver for a liquid crystal display panel, wherein the liquid crystal display panel displays the image data according to the display signal.

4. The integrated circuit as claimed in claim 3, wherein the integrated circuit is incorporated into a mobile electronic device.

5. A method for reducing electromagnetic interference in an integrated circuit, wherein the electromagnetic interference is induced by memory access, comprising:

generating a plurality of random codes according to a predetermined delay parameter;

obtaining an input clock signal according to a plurality of data requests;

spreading the spectrum of the input clock signal based on the random codes to derive a non-periodic output clock signal, wherein the step of spreading the spectrum of the input clock signal comprises;

providing a read flag or a write flag according to the data requests and sorting the data requests being routed to the memory unit, wherein the read flag is indicative of executing reading of the memory unit and the write flag is indicative of executing writing to the memory unit;

generating the input clock signal according to the data requests and the corresponding flag;

generating a plurality of phase delays respectively corresponding to each random code; and

deriving the output clock signal applied to the memory unit by individually delaying each pulse of the input clock signal by each phase delay; and

accessing image data to be displayed from a memory unit in response to the data requests and the output clock signal,

wherein the frequency spectrum of the output clock signal is wider than that of the input clock signal.

6. The method as claimed in claim 5, further comprising:

scanning the memory unit and generating a display signal in response thereto.

7. The method as claimed in claim 6, wherein the integrated circuit is a display driver for a liquid crystal display panel, wherein the liquid crystal display panel displays the image data according to the display signal.

8. The method as claimed in claim 7, wherein the integrated circuit is incorporated into a mobile electronic device.