Wake-and-go mechanism with prioritization of threads
First Claim
1. A method, in a data processing system, for performing a wake-and-go operation, the method comprising:
- detecting a current thread that is waiting for an event that modifies a data value associated with a target address;
determining whether there is data associated with a lower priority thread in a hardware private array of the data processing system, wherein the hardware private array cannot be addressed by an operating system or work threads running on a processor, wherein the lower priority thread is a thread having a lower priority than a priority of the current thread;
in response to a determination that there is a lower priority thread in the hardware private array, removing data associated with the lower priority thread from the hardware private array and a wake-and-go storage array;
storing thread state information for the current thread in the hardware private array;
populating the wake-and-go storage array with the target address;
placing the current thread in a sleep state; and
responsive to the event that modifies the data value associated with the target address, reloading the thread state information from the hardware private array and placing the current thread in a non-sleep state.
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Accused Products
Abstract
A hardware private array is a thread state storage that is embedded within the processor or within logic associated with a bus or wake-and-go logic. The hardware private array and/or wake-and-go array may have a limited storage area. Therefore, each thread may have an associated priority. If there is insufficient space in the hardware private array, then the wake-and-go mechanism may compare the priority of the thread to the priorities of the threads already stored in the hardware private array and wake-and-go array. If the thread has a higher priority than at least one thread already stored in the hardware private array and wake-and-go array, then the wake-and-go mechanism may remove a lowest priority thread, meaning the thread is removed from hardware private array and wake-and-go array and converted to a flee model.
212 Citations
20 Claims
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1. A method, in a data processing system, for performing a wake-and-go operation, the method comprising:
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detecting a current thread that is waiting for an event that modifies a data value associated with a target address; determining whether there is data associated with a lower priority thread in a hardware private array of the data processing system, wherein the hardware private array cannot be addressed by an operating system or work threads running on a processor, wherein the lower priority thread is a thread having a lower priority than a priority of the current thread; in response to a determination that there is a lower priority thread in the hardware private array, removing data associated with the lower priority thread from the hardware private array and a wake-and-go storage array; storing thread state information for the current thread in the hardware private array; populating the wake-and-go storage array with the target address; placing the current thread in a sleep state; and responsive to the event that modifies the data value associated with the target address, reloading the thread state information from the hardware private array and placing the current thread in a non-sleep state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A data processing system, comprising:
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a wake-and-go mechanism implemented in hardware; a hardware private array; and a wake-and-go array, wherein the wake-and-go mechanism is configured to; detect a current thread that is waiting for an event that modifies a data value associated with a target address; determine whether there is data associated with a lower priority thread in the hardware private array of the data processing system, wherein the hardware private array cannot be addressed by an operating system or work threads running on a processor, wherein the lower priority thread is a thread having a lower priority than a priority of the current thread; in response to a determination that there is a lower priority thread in the hardware private array, remove data associated with the lower priority thread from the hardware private array and a wake-and-go storage array; store thread state information for the current thread in the hardware private array; populate the wake-and-go storage array with the target address; place the current thread in a sleep state; and responsive to the event that modifies the data value associated with the target address, reload the thread state information from the hardware private array and place the current thread in a non-sleep state. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A computer program product comprising a non-transitory computer useable medium having a computer readable program, wherein the computer readable program, when executed on a computing device, causes the computing device to:
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detect a current thread that is waiting for an event that modifies a data value associated with a target address; determine whether there is data associated with a lower priority thread in a hardware private array of the data processing system, wherein the hardware private array cannot be addressed by an operating system or work threads running on a processor, wherein the lower priority thread is a thread having a lower priority than a priority of the current thread; in response to a determination that there is a lower priority thread in the hardware private array, remove data associated with the lower priority thread from the hardware private array and a wake-and-go storage array; store thread state information for the current thread in the hardware private array; populate the wake-and-go storage array with the target address; place the current thread in a sleep state; and responsive to the event that modifies the data value associated with the target address, reload the thread state information from the hardware private array and place the current thread in a non-sleep state.
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Specification