Semiconductor light emitting device including porous layer

• US 8,174,025 B2
• Filed: 06/09/2006
• Issued: 05/08/2012
• Est. Priority Date: 06/09/2006
• Status: Active Grant

• Current Assignee: Lumileds LLC (Apollo Global Management, Inc.)
• Original Assignee: Philips Lumileds Lighting Company LLC (Apollo Global Management, Inc.)
• Inventors: Epler, John E., Krames, Michael R., Zhao, Hanmin, Kim, James C.
• Primary Examiner(s): YEUNG LOPEZ, FEIFEI
• Application Number:
  US11/423,413
• Publication Number:
  US 20070284607A1
• Time in Patent Office: 2,160 Days
• Field of Search: None
• US Class Current: 257/79
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/16 with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table

Abstract

A light emitting device includes a semiconductor structure having a light emitting layer disposed between an n-type region and a p-type region. A porous region is disposed between the light emitting layer and a contact electrically connected to one of the n-type region and the p-type region. The porous region scatters light away from the absorbing contact, which may improve light extraction from the device. In some embodiments the porous region is an n-type semiconductor material such as GaN or GaP.

Claims

1. A device comprising:

a semiconductor structure including a light emitting element that includes a light emitting layer disposed between an n-type region and a p-type region; and

a contact electrically connected to one of the n-type region and the p-type region;

a porous semiconductor region disposed between the contact and the light emitting element, wherein at least a portion of the pores is disposed between the contact and the light emitting element such that the n-type region, the p-type region, and the light emitting layer are on one side of the porous semiconductor region and the contact is on an opposite side of the porous semiconductor region; and

wherein the semiconductor structure further comprises a first surface from which light extracted from the semiconductor structure is emitted, wherein the light emitting layer is disposed between the first surface and the porous region.

2. The device of claim 1 wherein the porous region has a thickness between 4 and 40 microns.

3. The device of claim 1 wherein the porous region has a porosity between 5% and 80%, wherein the porosity is the percent volume of air in the porous region.

4. The device of claim 1 wherein the porous region has a porosity between 20% and 40%, wherein the porosity is the percent volume of air in the porous region.

5. The device of claim 1 wherein the porous region comprises an n-type region.

6. The device of claim 1 wherein the porous region comprises a p-type region.

7. The device of claim 1 wherein the porous region comprises GaP.

8. The device of claim 1 wherein a surface of the porous region closest to the light emitting layer is spaced 0.1 to 0.4 microns from the light emitting layer.

9. The device of claim 1 wherein the porous region is disposed between the n-type region and the contact that is connected to the n-type region.

10. The device of claim 9 wherein the contact is a first contact and the first contact is electrically connected to the n-type region on a second surface of the semiconductor structure, the device further comprising a second contact electrically connected to the p-type region on the first surface of the semiconductor structure.

11. The device of claim 1 wherein the porous region is disposed between the p-type region and the contact that is connected to the p-type region.

12. The device of claim 11 wherein the contact is a first contact and the first contact is electrically connected to the p-type region, the device further comprising a second contact electrically connected to the n-type region, wherein the first contact is disposed on a second surface of the semiconductor structure and at least a portion of the second contact is disposed in a trench formed in the semiconductor structure.

13. The device of claim 1 wherein the contact is a first contact, the device further comprising a second contact, wherein one of the first and second contacts is disposed on a second surface of the semiconductor structure and the other of the first and second contacts is disposed in a trench formed in the semiconductor structure.

14. The device of claim 13 further comprising a conductive material disposed over the first surface of the semiconductor structure.

15. The device of claim 14 wherein the conductive material comprises indium tin oxide.

16. The device of claim 13 further comprising a superlattice comprising alternating layers of AlInP and InGaP, wherein the superlattice is disposed between the light emitting layer and the first surface of the semiconductor structure.

17. The device of claim 1 wherein a side surface of the semiconductor structure is substantially perpendicular to the first surface of the semiconductor structure.

18. The device of claim 1 wherein a side surface of the semiconductor structure is oblique to the first surface of the semiconductor structure.

19. The device of claim 1 wherein a side surface of the semiconductor structure is porous.

20. The device of claim 1 further comprising a polarizer disposed on the first surface of the semiconductor structure.

25. The device of claim 1 wherein the porous semiconductor region is arranged such that all light emitted from the light emitting layer in the direction of the contact strikes the porous semiconductor region before the contact.

21. A device comprising:

a semiconductor structure having a first surface, the semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region;

wherein;

a first portion of the first surface is a first surface of a porous region;

a second portion of the first surface is a first surface of a nonporous region; and

the second portion of the first surface is the surface from which a majority of light extracted from the semiconductor structure is emitted.

22. The device of claim 21 wherein a lateral extent of the light emitting layer corresponds to the second portion of the first surface.

23. The device of claim 21 wherein the porous region is GaN.

24. The device of claim 21 further comprising a metal contact disposed beneath the first region.

26. A device comprising:

a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region; and

a contact electrically connected to one of the n-type region and the p-type region;

a porous semiconductor region comprising GaP disposed between the contact and the light emitting layer, wherein at least a portion of pores of the porous region is disposed between the contact and the light emitting layer such that the n-type region, the p-type region, and the light emitting layer are on one side of the porous semiconductor region and the contact is on an opposite side of the porous semiconductor region; and

wherein the semiconductor structure further comprises a first surface from which light extracted from the semiconductor structure is emitted, wherein the light emitting layer is disposed between the first surface and the porous region.

27. The device of claim 26 wherein the porous region has a thickness between 4 and 40 microns.

28. The device of claim 26 wherein the porous region has a porosity between 5% and 80%, wherein the porosity is the percent volume of air in the porous region.

29. The device of claim 26 wherein the porous region has a porosity between 20% and 40%, wherein the porosity is the percent volume of air in the porous region.

30. The device of claim 26 wherein the porous region comprises an n-type region.

31. The device of claim 26 wherein the porous region comprises a p-type region.

32. The device of claim 26 wherein the contact is a first contact, the device further comprising a second contact, wherein one of the first and second contacts is disposed on a second surface of the semiconductor structure and the other of the first and second contacts is disposed in a trench formed in the semiconductor structure.

33. The device of claim 26 wherein a side surface of the semiconductor structure is porous.

34. The device of claim 26 further comprising a polarizer disposed on the first surface of the semiconductor structure.

35. The device of claim 26 further comprising a superlattice comprising alternating layers of AIInP and InGaP, wherein the superlattice is disposed between the light emitting layer and the first surface of the semiconductor structure.

36. The device of claim 26 wherein a surface of the porous region closest to the light emitting layer is spaced 0.1 to 0.4 microns from the light emitting layer.