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Dummy pattern in wafer backside routing

  • US 8,174,124 B2
  • Filed: 04/08/2010
  • Issued: 05/08/2012
  • Est. Priority Date: 04/08/2010
  • Status: Active Grant
First Claim
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1. A device comprising:

  • a semiconductor substrate comprising a front side and a backside;

    a through-substrate via (TSV) penetrating the semiconductor substrate; and

    a first dummy metal line on the backside of the semiconductor substrate.

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