Power amplifier device

• US 8,183,930 B2
• Filed: 02/24/2011
• Issued: 05/22/2012
• Est. Priority Date: 02/26/2010
• Status: Expired due to Fees

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Kawakami, Tsuyoshi, Nishikawa, Kazuyasu
• Primary Examiner(s): Choe, Henry
• Application Number:
  US13/034,216
• Publication Number:
  US 20110210792A1
• Time in Patent Office: 453 Days
• Field of Search: 330/295, 330/124.R, 330/84, 330/126, 330/165, 330/276
• US Class Current: 330/295
• CPC Class Codes: H03F 2203/45352 the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled transistors
• CPC Class Codes: H03F 2203/45364 the AAC comprising multiple transistors parallel coupled at their gates and sources only, e.g. in a cascode dif amp, only those forming the composite common source transistor
• CPC Class Codes: H03F 2203/45731 the LC comprising a transformer
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence

Abstract

This invention provides a power amplifier device that satisfies both of delivering a high output and reducing the chip area occupied by the power amplifier device. The power amplifier device formed over a substrate comprises primary inductors arranged in a generally circular geometry, a ground pattern, transistor pairs, and a secondary inductor. The ground pattern is provided to extend from a portion of a region inside the circular primary inductor into regions outside the primary inductor, when viewed from the direction perpendicular to the substrate, and grounded at a plurality of points in the regions outside the primary inductor. To both ends of each primary inductor, first main electrodes of first and second transistors forming a transistor pair in linkage with the primary inductor are coupled respectively. Second main electrodes of the first and second transistors are coupled to the ground pattern in the region inside the primary inductor and have electrical conduction to the respective plurality of points grounded.

Claims

1. A power amplifier device formed over a substrate, comprising:

a primary inductor comprising a plurality of inductor elements arranged in a generally circular geometry, when viewed from a direction perpendicular to the substrate;

a ground pattern provided to extend from a portion of a region inside the primary inductor which is circular into regions outside the primary inductor, when viewed from the direction perpendicular to the substrate, and grounded at a plurality of points in the regions outside the primary inductor; and

a plurality of transistor pairs, each being provided for linking with each of the plurality of inductor elements,

wherein, to both ends of each of the plurality of inductor elements, first main electrodes of first and second transistors forming a transistor pair in linkage with the inductor element are coupled respectively,

wherein second main electrodes of the first and second transistors are coupled to the ground pattern in the region inside the primary inductor and have electrical conduction to the respective plurality of points,

wherein first and second signals in a pair as differential input signals are supplied to control electrodes of the first and second transistors, respectively, and

wherein the power amplifier device further includes a secondary inductor which includes one turn of winding or multiple turns of winding, provided circularly so as to surround the primary inductor, and the secondary inductor further combines and outputs combined signals of the first and second signals combined in each of the inductor elements by magnetically coupling to the primary inductor.

3. The power amplifier device according to claim 1,

wherein the primary induction is formed circularly around a central axis that is vertical to the substrate and has mirror symmetries with respect to each of one or a plurality of symmetry planes, each including the central axis, and

wherein the ground pattern comprises:

a plurality of first wiring portions, each extending from the vicinity of an intersection point at which the central axis intersects with the surface of the substrate along any of the one or plurality of symmetry planes into a region outside the primary inductor and grounded in the region outside the primary inductor; and

a junction portion provided in the vicinity of the intersection point and joining the plurality of first wiring portions.

4. The power amplifier device according to claim 3, wherein the ground pattern further comprises a plurality of second wiring portions, each being coupled to any of the plurality of first wiring portions and the junction portion and extending in a direction intersecting the primary inductor into a region outside the primary induction.

5. The power amplifier device according to claim 4, wherein at least one of the plurality of second wiring portions is ground in a region outside the primary inductor.

6. The power amplifier device according to claim 1,

wherein the primary induction is formed circularly around a central axis vertical to the substrate and has mirror symmetries with respect to each of one or a plurality of symmetry planes, each including the central axis,

wherein the ground pattern has a geometry in which a plurality of slit openings are made in a single plane pattern extending from a region inside the primary inductor into regions outside the primary inductor, when viewed from the direction perpendicular to the substrate, the slit openings being made along directions intersecting the primary inductor so that no closed round path is formed around the central axis, and

wherein the second main electrodes of the transistors forming the one or plurality of transistor pairs are inter-coupled together.

7. The power amplifier device according to claim 1,

wherein the first and second main electrodes are formed using a first metal layer formed over the substrate,

wherein the ground pattern is formed using a second metal layer formed farther away from the substrate than the first metal layer, and

wherein the primary inductor and the secondary inductor are formed using a third metal layer formed farther away from the substrate than the second metal layer.

8. The power amplifier device according to claim 1, wherein the primary inductor, the secondary inductor, and the ground pattern are formed using a same metal layer formed over the substrate, except for portions overlapping with each other, when viewed from the direction perpendicular to the substrate.

2. A power amplifier device formed over a substrate, comprising:

a primary inductor which includes one turn of winding or multiple turns of winding, arranged in a circular geometry, when viewed from the direction perpendicular to the substrate;

a ground pattern provided to extend from a portion of a region inside the primary inductor which is circular into regions outside the primary inductor, when viewed from the direction perpendicular to the substrate, and grounded at a plurality of points in the regions outside the primary inductor; and

a transistor pair provided over the substrate,

wherein, to both ends of the primary inductor, first main electrodes of first and second transistors forming the transistor pair are coupled respectively,

wherein second main electrodes of the first and second transistors are coupled to the ground pattern in the region inside the primary inductor and have electrical conduction to the respective plurality of points,

wherein first and second signals in a pair as differential input signals are supplied to control electrodes of the first and second transistors, respectively, and

wherein the power amplifier device further includes a secondary inductor which comprises one turn of winding or multiple turns of winding, provided circularly so as to surround the primary inductor, and the secondary inductor outputs a combined signal of the first and second signals combined in the primary inductor by magnetically coupling to the primary inductor.

9. The power amplifier device according to claim 2,

wherein the primary induction is formed circularly around a central axis that is vertical to the substrate and has mirror symmetries with respect to each of one or a plurality of symmetry planes, each including the central axis, and

wherein the ground pattern comprises:

a plurality of first wiring portions, each extending from the vicinity of an intersection point at which the central axis intersects with the surface of the substrate along any of the one or plurality of symmetry planes into a region outside the primary inductor and grounded in the region outside the primary inductor; and

a junction portion provided in the vicinity of the intersection point and joining the plurality of first wiring portions.

10. The power amplifier device according to claim 9, wherein the ground pattern further comprises a plurality of second wiring portions, each being coupled to any of the plurality of first wiring portions and the junction portion and extending in a direction intersecting the primary inductor into a region outside the primary induction.

11. The power amplifier device according to claim 10, wherein at least one of the plurality of second wiring portions is ground in a region outside the primary inductor.

12. The power amplifier device according to claim 2,

wherein the primary induction is formed circularly around a central axis vertical to the substrate and has mirror symmetries with respect to each of one or a plurality of symmetry planes, each including the central axis,

wherein the ground pattern has a geometry in which a plurality of slit openings are made in a single plane pattern extending from a region inside the primary inductor into regions outside the primary inductor, when viewed from the direction perpendicular to the substrate, the slit openings being made along directions intersecting the primary inductor so that no closed round path is formed around the central axis, and

wherein the second main electrodes of the transistors forming the one or plurality of transistor pairs are inter-coupled together.

13. The power amplifier device according to claim 2,

wherein the first and second main electrodes are formed using a first metal layer formed over the substrate,

wherein the ground pattern is formed using a second metal layer formed farther away from the substrate than the first metal layer, and

wherein the primary inductor and the secondary inductor are formed using a third metal layer formed farther away from the substrate than the second metal layer.

14. The power amplifier device according to claim 2, wherein the primary inductor, the secondary inductor, and the ground pattern are formed using a same metal layer formed over the substrate, except for portions overlapping with each other, when viewed from the direction perpendicular to the substrate.