Multifunction receiver-on-chip for electronic warfare applications

• US 8,185,221 B1
• Filed: 04/22/2009
• Issued: 05/22/2012
• Est. Priority Date: 01/20/2005
• Status: Active Grant

• Current Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Inventors: Stroili, Frank D., Huggett, James M.
• Primary Examiner(s): Bahta, Kidest
• Application Number:
  US12/386,681
• Publication Number:
  US 20120121269A1
• Time in Patent Office: 1,126 Days
• Field of Search: 700/29, 700/90, 700/303, 701/11, 257/728, 342/12, 342/155
• US Class Current: 700/90
• CPC Class Codes: G01S 7/032 Constructional details for solid-state radar subsystems
• CPC Class Codes: G01S 7/38 Jamming means, e.g. producing false echoes

Abstract

What is provided is a receiver-on-a-chip comprising a monolithic integrated circuit that reduces the receiver to a cigarette-pack-sized assembly mountable directly at an antenna element, with a much-increased operational bandwidth and instantaneous bandwidth, increased dynamic range and with a two-order-of-magnitude decrease in size and weight. Moreover, because of the elimination of all of the I/O drivers and attendant circuitry, power consumption is reduced by two-thirds, whereas the mean time before failure is increased to 10,000 hours due to the robustness of the monolithic integrated circuit and use of fiber optics.

Claims

1. A flexible multi-function broadband receiver system for use in electronic warfare on vehicles having weight, size and power consumption limitations, comprising

a receiver-on-a-chip having components monolithically formed on a substrate to provide a single integrated circuit chip for performing broadband signal detection having no I/O buffers or drivers between circuits and, having no more than one local oscillator and down conversion unit, said receiver-on-a-chip using high speed analog-to-digital converters having switching speeds exceeding 100 GHz to permit the use of only one down conversion unit, a digital signal processor for defining receiver function, whereby modularization is avoided and wherein size and power consumption are minimized.

2. The system of claim 1, wherein the transistors in a circuit thereof include silicon geranium transistors.

3. The system of claim 1, and further including an array of antenna elements, one of said receivers-on-a-chip located and coupled to a respective antenna element such that said receivers-on-a-chip are located at the antenna elements.

4. The system of claim 3, wherein each of said receivers-on-a-chip includes a fiber optic output, and further including a unit for processing the outputs of said receivers-on-a-chip and fiber optic cables coupling said receiver to said unit, thereby to eliminate the necessity of providing coaxial cable between an antenna element and a follow-on processing unit.

5. The system of claim 1, wherein the circuits of said receivers-on-a-chip are direct coupled, thus eliminating the requirement for drivers and buffers between the circuit elements of said receivers-on-a-chip, thus to markedly reduce power consumption.

6. The system of claim 1, wherein each of said receivers-on-a-chip occupies no more than seven cubic inches.

7. The system of claim 1, wherein the operating frequency of each of said receivers-on-a-chip is between 0.039 GHz and 18 GHz.

8. The system of claim 1, wherein the instantaneous bandwidth of each of said receivers-on-a-chip is in excess of 2000 MHz.

9. The system of claim 1, wherein the weight of each of said receivers-on-a-chip is less than one pound.

10. The system of claim 1, wherein the mean time before failure of said receivers-on-a-chip exceeds 10,000 hours.

11. A flexible multi-function broadband receiver system for use in electronic warfare on vehicles having weight, size and power consumption limitations, comprising:

a receiver-on-a-chip having components monolithically formed on a substrate to provide a single integrated circuit chip for performing broadband signal detection using high speed analog-to-digital converters, at least one down-conversion circuit, a digital automatic gain control circuit, a digital signal processor for defining receiver function and a serializer all located on the single integrated circuit chip, whereby modularization is avoided and wherein size and power consumption are minimized, wherein the transistors in a circuit thereof include silicon germanium transistors having switching speeds exceeding 100 GHz, thus to provide for said high speed analog-to-digital converters and reducing the number of IF down-conversion stages; and

further including an array of antenna elements, a receiver-on-a-chip located and coupled to a respective antenna element.

12. The system, of claim 11, wherein said receiver-on-a-chip includes a fiber optic output, and further including a unit for processing the output of said receiver-on-a-chip and fiber optic cables coupling said receiver-on-a-chip to said unit, thereby to eliminate the necessity of providing coaxial cable between an antenna element and a follow-on processing unit.

13. The system of claim 11, wherein the circuits of said receiver-on-a-chip are direct coupled, thus eliminating the requirement for drivers and buffers between the circuit elements of said receiver, thus to markedly reduce power consumption.

14. The system of claim 11, wherein said receiver-on-a-chip occupies no more than seven cubic inches.