Error recovery within processing stages of an integrated circuit
First Claim
1. An integrated circuit for performing data processing, said integrated circuit comprising:
- an error detector configured to detect errors in an output signal of a processing circuit element of said integrated circuit based on monitoring only said output signal of said processing circuit element;
error-repair circuitry responsive to said error detector and configured to repair errors in operation; and
an operational parameter controller configured to control one or more performance controlling operational parameters of said integrated circuit;
wherein said operational parameter controller controls at least one of said one or more performance controlling parameters in dependence upon one or more characteristics of errors detected by said error detector such that said integrated circuit has a non-zero rate of errors in operation, andwherein said error repair circuitry is configured to repair errors in operation such that data processing by said integrated circuit continues.
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Accused Products
Abstract
An integrated circuit includes a plurality of processing stages each including processing logic, a non-delayed signal-capture element, a delayed signal-capture element and a comparator. The non-delayed signal-capture element captures an output from the processing logic at a non-delayed capture time. At a later delayed capture time, the delayed signal-capture element also captures a value from the processing logic. An error detection circuit and error correction circuit detect and correct random errors in the delayed value and supplies an error-checked delayed value to the comparator. The comparator compares the error-checked delayed value and the non-delayed value and if they are not equal this indicates that the non-delayed value was captured too soon and should be replaced by the error-checked delayed value. The non-delayed value is passed to the subsequent processing stage immediately following its capture and accordingly error recovery mechanisms are used to suppress the erroneous processing which has occurred by the subsequent processing stages, such as gating the clock and allowing the correct signal values to propagate through the subsequent processing logic before restarting the clock. The operating parameters of the integrated circuit, such as the clock frequency, the operating voltage, the body biased voltage, temperature and the like are adjusted so as to maintain a finite non-zero error rate in a manner that increases overall performance.
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Citations
43 Claims
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1. An integrated circuit for performing data processing, said integrated circuit comprising:
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an error detector configured to detect errors in an output signal of a processing circuit element of said integrated circuit based on monitoring only said output signal of said processing circuit element; error-repair circuitry responsive to said error detector and configured to repair errors in operation; and an operational parameter controller configured to control one or more performance controlling operational parameters of said integrated circuit; wherein said operational parameter controller controls at least one of said one or more performance controlling parameters in dependence upon one or more characteristics of errors detected by said error detector such that said integrated circuit has a non-zero rate of errors in operation, and wherein said error repair circuitry is configured to repair errors in operation such that data processing by said integrated circuit continues. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A method of controlling an integrated circuit for performing data processing, said method comprising the steps of:
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detecting errors in an output signal of a processing circuit element of said integrated circuit based on monitoring only said output signal of said processing circuit element; repairing detected errors in operation; and controlling one or more performance controlling operational parameters of said integrated circuit; wherein at least one of said one or more performance controlling parameters is controlled in dependence upon one or more characteristics of detected error such that said integrated circuit has a non-zero rate of errors in operation, errors in operation being repaired such that data processing by said integrated circuit continues. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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43. An integrated circuit for performing data processing, said integrated circuit comprising:
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error detecting means for detecting errors in an output signal of a processing element of said integrated circuit based on monitoring only said output signal of said processing circuit element; error-repair means for repairing errors in operation; and operational parameter controlling means for controlling one or more performance controlling operational parameters of said integrated circuit; wherein said operational parameter controlling mean controls at least one of said one or more performance controlling parameters in dependence upon one or more characteristics of errors detected by said error detecting means such that said integrated circuit has a non-zero rate of errors in operation, and wherein said error-repair means is configured to repair errors in operation such that data processing by said integrated circuit continues.
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Specification